Compound semiconductor-on-silicon wafer with a thermally soft insulator

Abstract

A method is provided for forming a compound semiconductor-on-silicon (Si) wafer with a thermally soft insulator. The method forms a Si substrate, with a thermally soft insulator layer overlying the Si substrate. A silicon oxide layer is formed immediately overlying the thermally soft insulator layer, a top Si layer overlies the silicon oxide, and a lattice mismatch buffer layer overlies the top Si layer. A compound semiconductor layer is formed overlying the lattice mismatch buffer layer. The thermally soft insulator has a liquid phase temperature lower than the liquid phase temperatures of Si and the compound semiconductor. For example, the thermally soft insulator may have a flow temperature in the range of about 500° C. to 900° C., where the flow temperature is greater than the solid phase temperature and less than the liquid phase temperature.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]This invention generally relates to integrated circuit (IC) fabrication and, more particularly, to a wafer that uses a layer to insulate a compound semiconductor from thermally-induced lattice mismatches with an underlying silicon (Si) substrate.[0003]2. Description of the Related Art[0004]Gallium nitride (GaN) is a Group III / Group V compound semiconductor material with wide bandgap (3.4 eV), which has optoelectronic, as well as other applications. Like other Group III nitrides, GaN has a low sensitivity to ionizing radiation, and so, is useful in solar cells. GaN is also useful in the fabrication of blue light-emitting diodes (LEDs) and lasers. Unlike previous indirect bandgap devices (e.g., silicon carbide), GaN LEDs are bright enough for daylight applications. GaN devices also have application in high power and high frequency devices, such as power amplifiers.[0005]GaN LEDs are conventionally fabricated using a metal...

AI Technical Summary

Benefits of technology

[0009]The present invention describes GaN grown on a Si wafer with a soft buried insulator to absorb the thermal mismatches. The structure is similar in concept to a buried oxide layer (BOX) of a Si-on-insulator (SOI) wafer. That is, the so-called “thermally soft insulator” (TSI) isolates mechanical stresses between the GaN layer and the Si substrate, avoiding wafer deformation. In one aspect, conventional boronphosphosilicate glass (BPSG) is used as the thermal insulator. At high wafer temperatures, the BPSG becomes mechanically soft, isolating the thermal expansion of the top GaN layer and the bottom Si substrate. The temperature at which BPSG is soft can be adjusted, dependent upon the density of boron and phosphorous in the silicon oxide. With 4 atomic percentage (at %) of P, and 7 at % of B, the BPSG flow temperature is about 700° C. and the mechanically soft temperature is lower than 600° C. Therefore, there is no mechanical stress when the wafer temperature is higher than 600° C.

Problems solved by technology

However, these substrates are expensive to make, and their small size also drives fabrication costs.

There are two fundamental problems associated with GaN-on-Si device technology.

First, there is a lattice mismatch between Si and GaN.

However, an additional and more serious problem exists, as there is also a thermal mismatch between Si and GaN.

Although the lattice buffer layer may absorb part of the thermal mismatch, the necessity of using temperatures higher than 1000° C. during epi growth and other device fabrication may cause wafer deformation.

The wafer deformation can be reduced with a very slow rate of heating and cooling during wafer processing but this adds additional cost to the process, and doesn't completely solve the thermal stress and wafer deformation issues.

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