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Integrated circuit device and fabrication using metal-doped chalcogenide materials

a technology of integrated circuit and chalcogenide, which is applied in the direction of instruments, cameras, vacuum evaporation coating, etc., can solve the problems of increasing the chance of contamination or other damage during transportation, time-consuming process, and traditional photo-doping process, so as to reduce the concern of contamination and physical damage, and improve the reliability of the device

Inactive Publication Date: 2005-02-03
LI JIUTAO +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0013] Methods are described herein for forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers. The methods include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of a chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.

Problems solved by technology

There are several disadvantages to the traditional photo-doping process.
The process can be time consuming as the semiconductor wafers are moved in and out of a vacuum chamber during the various processing stages described above.
This movement of the semiconductor wafers among various process equipment also increases the chance of contamination or other damage during transport.
Also, because the metal layer must be thin for efficient photon-induced diffusion of metal, the desired doping level may not be efficiently attainable with a single photo-doping process as the necessary thickness of the metal layer may result in excessive reflection of the electromagnetic radiation.

Method used

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Embodiment Construction

[0025] In the following detailed description of the present embodiments, reference is made to the accompanying drawings that form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that process, electrical or mechanical changes may be made without departing from the scope of the present invention. The terms wafer or substrate used in the following description include any base semiconductor structure. Examples include silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of a silicon supported by a base semiconductor structure, as well as other semiconductor structures well known to one skilled in the art. Furthermore, wh...

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Abstract

Methods of forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of the chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.

Description

TECHNICAL FIELD OF THE INVENTION [0001] The present invention relates generally to integrated circuit memory devices, and in particular to the metal doping of chalcogenide materials in the fabrication of chalcogenide memory elements and integrated circuit devices containing such memory elements. BACKGROUND OF THE INVENTION [0002] Electrically programmable and erasable materials, i.e., materials that can be electrically switched between a generally resistive state and a generally conductive state are well known in the art. Chalcogenide materials are one class of examples of such materials finding use in the semiconductor industry, particularly in the fabrication of non-volatile memory devices. [0003] Chalcogenide materials are compounds made of one or more chalcogens and one or more elements that are more electropositive than the chalcogens. Chalcogens are the Group VIB elements of the traditional IUPAC version of the periodic table, i.e., oxygen (O), sulfur (S), selenium (Se), tellu...

Claims

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Application Information

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IPC IPC(8): C23C14/06C23C14/54C23C14/58C23C14/34H01L27/105H01L27/24H01L45/00
CPCC23C14/0623C23C14/544C23C14/5846H01L27/2409H01L45/1658H01L45/1233H01L45/141H01L45/143H01L45/085H10B63/20H10N70/245H10N70/882H10N70/8825H10N70/826H10N70/046C23C14/18
Inventor LI, JIUTAOMCTEER, ALLEN
Owner LI JIUTAO
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