Method and apparatus for performing frame processing for a network

Abstract

An improved frame processing apparatus for a network that supports high speed frame processing is disclosed. The frame processing apparatus uses a combination of fixed hardware and programmable hardware to implement network processing, including frame processing and media access control (MAC) processing. Although generally applicable to frame processing for networks, the improved frame processing apparatus is particular suited for token-ring networks and ethernet networks. The invention can be implemented in numerous ways, including as an apparatus, an integrated circuit and network equipment.

Description

COPYRIGHT NOTICE[0001] A portion of the disclosure of this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure as it appears in the Patent and Trademark Office patent file or records, but otherwise reserves all copyright rights whatsoever.[0002] 1. Field of the Invention[0003] The present invention relates to data communications networks and, more particularly, to switching data frames through data communications networks.[0004] 2. Description of the Related Art[0005] Frame processing is performed at nodes of networks, such as local area networks (LANs). By processing frames, the nodes are able to determine how to forward or switch frames to other nodes in the network.[0006] FIG. 1 is a block diagram of a conventional frame processing apparatus 100. The conventional frame processing apparatus 100 is suitable for use in a LAN, namely a t...

AI Technical Summary

Benefits of technology

[0018] The advantages of the invention are numerous. One advantage of the invention is that a frame processing apparatus is able to process frames faster, thus allowing the frame processing apparatus to service more ports than conventionally possible. Another advantage of the invention is that the frame processing apparatus according to the invention requires significantly fewer integrated circuit chips per port serviced.

[0019] Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.

[0020] The present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements, and in which:

[0021] FIG. 1 is a block diagram of a conventional frame processing apparatus;

[0022] FIG. 2 is a block diagram of a frame processing apparatus according to an

Problems solved by technology

One problem with conventional frame processing apparatuses, such as the conventional frame processing apparatus 100 illustrated in FIG. 1, is that the general purpose microprocessor is not able to process data frames at high speed.

As a result, the number of ports that the conventional frame processing apparatus can support is limited by the speed at which the general purpose microprocessor can perform the filtering operations.

The use of specialized microprocessors is an improvement but places additional burdens on the bandwidth requirements of the data paths.

Another problem with the conventional frame processing apparatus is that the data path to and from the physical layer and the frame buffer during reception and transmission of data has various bottlenecks that render the conventional hardware design inefficient.

Yet another disadvantage of the conventional frame processing apparatus is that it requires a large number of integrated circuit chips.

Although frame processing could be implemented in hardwired logic, such an approach would be unreasonable given the complexities of the frame processing.

In addition, the normal initialization process of sending loop-media test frames is not applicable when connectivity has been ascertained prior to any insertion attempt.

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