Electrostatic discharge protection circuit for RF identification chip

Abstract

The invention advances a CMOS process-based on-chip electrostatic discharge (ESD) protection circuit applied to radio frequency identification (RFID) chips, composed of chip ground on-chip ESD protection circuit used to connect two pressure points of an outside-chip antenna, and inside-chip circuit directly or indirectly connected with pressure points, and giving circuit structure and design method, where the on-chip ESD protection circuit for the RFID chip is an important solution to assure the chip avoids ESD failure. And it considers three discharging models of human body model (HBM), machine model (MM) and charging device model (CDM) and simultaneously considers validity of ESD protection circuit and insensibility to process, and it is an ESD protection circuit with strong robustness, applied to RFID chip.

Description

1. Technical Field [0001] The invention is an on-chip electrostatic discharge protection circuit for radio frequency identification chips, which is characterized by considering the three electrostatic discharge models of HBM, MM and CDM, while ensuring the effectiveness of the electrostatic discharge protection circuit and its insensitivity to the process. In other words, the proposed electrostatic discharge protection circuit for radio frequency identification chips has strong effectiveness and robustness. 2. Background technology [0002] Electrostatic discharge (ESD) phenomenon often occurs in people's daily life, and it is also one of the main reasons for the failure of integrated circuit (IC) chips. For CMOS process IC chips, IC failures caused by ESD include reverse breakdown of PN junction, gate oxide breakdown, and metal connection line damage. Passivation layer cracks and electromigration damage may also occur. When the IC device is in operation, a latch-up effect may al...

AI Technical Summary

Problems solved by technology

For CMOS process IC chips, IC failures caused by ESD include reverse breakdown of the PN junction, breakdown of the gate oxide layer and damage to the metal connection line, and cracks in the passivation layer and electromigration damage may also occur

When the IC device is working, it may also cause a latch-up effect, resulting in thermal damage to the IC due to high current

Generally speaking, ICs damaged by ESD either fail to work, or have reduced performance or poor reliability.

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