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Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN

A technology of receivers and cancellers, applied in the direction of transmission systems, electrical components, etc., can solve the problem of not being able to suppress the preceding ISI

Inactive Publication Date: 2005-12-14
GCT SEMICONDUCTOR INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, in actual high-speed WLAN packet transmission, the DFE usually only consists of a feedback filter and cannot suppress the look-ahead ISI

Method used

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  • Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
  • Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN
  • Bidirectional turbo ISI canceller-based DSSS receiver for high-speed wireless LAN

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Embodiment Construction

[0027] 1(a) and 1(b) are block diagrams of, for example, a DSSS / CCK communication system that can be used for IEEE 802.11b wireless LAN. As shown in Figure 1(a), first, the scrambler 1 scrambles the source bit (source bit) in the data packet, then, at time k (k=0, 1, ..., k-1), Group them into the k-th octet block 2 (b(k)={b 0 (k), b 1 (k),...b 7 (k)}). Then, according to the DQPSK encoder 3 1 , the first pair (b 0 (k), b 1 (k)) are mapped to different encoded phase angles φ 1 (k), while according to encoder 3 2 、3 3 and 3 4 Natural QPSK encoding within, other bit pairs (b 2 (k), b 3 (k)), (b 4 (k), b 5 (k)), (b 6 (k), b 7 (k)) are mapped to φ 2 (k), φ 3 (k) and φ 4 . Note that these four corners can take values ​​within the set {0, π / 2, π, 3π / 2} respectively. In selector 4, according to the following equation, among the four corners, the natural coded angle φ is used 2 (k), φ 3 and φ 4 Generate 64 base CCK code words c(k)=(c 0(k), c 1 (k),...,c 7 (k)...

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Abstract

A bidirectional turbo ISI canceller removes preceding ISI (94) and following ISI (90) in the received signal without inserting a multiplicative feed-forward equalization filter. This is achieved by employing a three-step receiver design methodology. In the first step, under the assumption that the previous symbol or the tail symbol does not produce ISI, l designs the optimal single-symbol RAKE receiver to include: CMF (9), code word correlator group and energy offset EB, in The second step involves DFE (16) to suppress subsequent ISI (90) produced by previous symbols. Finally, the remaining ISI generated by the tail symbols is removed using a lookahead ISI (94) canceller. All three of these components can be integrated 10 into a BTIC-based receiver employing turbo iterative processing.

Description

technical field [0001] The present invention relates generally to wireless communications, and more particularly to iterative removal of precursor inter-symbol interference on wireless multipath channels by employing a bidirectional turbo ISI canceller (ISI) and postcursor (postcursor) ISI Direct Sequence Spread Spectrum Communication (DSSS) packet receivers. Background technique [0002] DSSS technology is widely used in major wireless communication standards such as IS-95, CDMA 2000, W-CDMA, IEEE 802.11 wireless local area network (WLAN), and other networks. These DSSS systems usually transmit the information bits in wideband chip sequences, but they differ significantly for embedded data modulation methods, ie from the most common BPSK and QPSK to high order QAM and codeword selective modulation. [0003] Currently, the DSSS system based on Complementary Code Keying (CCK) has been adopted as the 802.11b standard with a rate of 5.5Mbps / 11Mbps, which is used for the high-s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/69
Inventor 金炳勋江顺曹峰尤李京浩
Owner GCT SEMICONDUCTOR INC
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