Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Low profile, high density memory system

A technology for electronic packaging and semiconductors, applied in electrical components, printed circuits, electrical digital data processing, etc., and can solve problems such as reducing the length of bus paths.

Inactive Publication Date: 2007-07-18
HIGH CONNECTION DENSITY INC
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0028] Because more memory can be placed on a single card, physically closer to the driver circuit than previous memory systems, the length of all bus paths is therefore greatly reduced

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low profile, high density memory system
  • Low profile, high density memory system
  • Low profile, high density memory system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0105] Generally speaking, the present invention is a low-thickness, high-density electronic package for high-speed, high-performance semiconductors, such as memory devices made of bare memory chips or general memory chip packages. The memory module optionally has bus terminations on the module. It consists of multiple modules with a high-speed, impedance-controlled transmission line bus, short LGA interconnects between the modules and the motherboard, and optional driver line termination built into one of the modules to maintain high electrical performance . Thermal control structures may be included to maintain the high density module within a reliable operating temperature range.

[0106] Please refer to FIG. 1 a , which shows a schematic diagram of a multi-card (2-card) memory system 10 in the prior art. Typically two-slot and three-slot boards require terminations on the motherboard 12, even when all slots are unused. Standard card-on-board connectors 22 , 36 provide a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The present invention provides a low profile, high density electronic package for high speed, high performance semiconductors, such as memory devices. It includes a plurality of modules having high speed, impedance-controlled transmission line buses, short interconnections between modules and, optionally, driver line terminators built into one of the modules, for maintaining high electrical performance. Suitable applications include microprocessor data buses and memory buses such as RAMBUS and DDR. The modules may be formed on conventional printed circuit cards with unpacked or packed memory chips attached directly to the memory module. Thermal control structures may be included to maintain the high density modules within a reliable range of operating temperature.

Description

technical field [0001] The present invention relates to a high-density, low-thickness electronic package and, in particular, to a high-performance, high-density memory module having an impedance-controlled transmission line bus, and optionally built-in drive line termination modules for high maintenance High-density, low-profile packaging for electrical performance. Background technique [0002] Related Patent Applications [0003] The patent application of the present invention is related to the U.S. Patent No. 6,72,895 proposed by Brown et al. "High-speed memory module with built-in high-speed bus termination", U.S. patent application No. filed on December 9, 1999 09 / 457,776, and U.S. Patent Application Nos. 09 / 461,065, filed December 14, 1999; U.S. Patent Application Nos. 09 / 645,860, 09 / 645,859, 60 / 227,689, and 09 / 645,858, filed August 24, 2000 ; The US Patent Application No. 09 / 772,641 filed on January 31, 2001 is designated as a reference document for the patent of th...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G11C13/00G06F1/18G06F3/00G06F12/00G06F13/16G11C5/00G11C5/06H05K1/14
CPCG11C5/04H05K1/144G11C5/063
Inventor 范智能艾D·雷李泽豫
Owner HIGH CONNECTION DENSITY INC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com