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Filming method of silicon wafer after IMD CMP

A film-forming method and a technology of silicon wafers, which are applied in the manufacture of electrical components, semiconductor/solid-state devices, circuits, etc., can solve problems such as residual film exceeding the specification, prolonging the production cycle, and large fluctuations in grinding rate, etc., and shorten the production cycle , Etching stability, and the effect of improving product quality

Inactive Publication Date: 2007-02-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the IMD CMP process, due to the large fluctuations in the grinding rate of the CMP equipment, and the difference between the working chambers of the equipment that grows the IMD before the CMP, the residual film after the CMP process often exceeds the specification, and the traditional process is adopted after the CMP process. The fixed PCO (growth oxide film) growth conditions make it necessary to correct the thickness of the residual film to within the specification range through rework, so as to ensure the stability of the subsequent VIA (contact hole) etching thickness
This not only prolongs the production cycle of the product, but also increases the load rate of CMP equipment and PCO equipment

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0008] The present invention will be further described below in conjunction with embodiment.

[0009] After the silicon wafer IMD CMP, according to the residual film thickness after CMP, the corresponding PCO (growth oxide film) film forming conditions are automatically selected. That is, if the residual film thickness after CMP is thicker, select the PCO condition with less film formation; if the residual film thickness after CMP is thinner, select the corresponding PCO (growth oxide film) condition with more film formation. Therefore, the oxide film formed by PCO is basically at the same level, so that the etching of VIA (contact hole) is relatively stable.

[0010] CMP residual film thickness

PCO film forming conditions

3000-3499 Ȧ

A (growth is 5000 Ȧ)

3500-3999A

B (growth is 4500 Ȧ)

4000-4499 Ȧ

C (growth is 4000 Ȧ)

4500-4999A

D (growth is 3500 Ȧ)

5000-5499A

E (growth is 3000 Ȧ)

[0011] For...

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PUM

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Abstract

This invention discloses a silicon IMD CMP film process method, which reduces the production circle and flats the isolation layer oxygen film between the silicon metal align wires and improves the integration quality. The key points of this technique lies in the following: to automatically choose relative PCO film forming conditions according to the thickness of the remain film of silicon pad IMD and CMP.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process method, in particular to a silicon chip IMD film forming method after CMP. Background technique [0002] With the continuous improvement of semiconductor manufacturing technology, multi-layer wiring technology has emerged, which makes the device size and line width shrink continuously, and greatly improves the integration of semiconductor devices. However, the emergence of multi-layer wiring has led to large step differences and unevenness on the surface of the silicon wafer, resulting in poor metal wiring and difficulties in focusing in subsequent lithography. To solve this problem, the CMP (Chemical Mechanical Planarization) process was introduced. It uses chemical reaction and mechanical grinding and polishing to make the unevenness on the surface of the silicon wafer tend to be flattened, and the IMD CMP (chemical mechanical planarization of intermetallic dielectric layer) process uses...

Claims

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Application Information

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IPC IPC(8): H01L21/31H01L21/768
Inventor 殷建斐张震宇蔡晨
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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