Neural network computing module, method and communication device

Abstract

The present invention provides a neural network calculation module, method and communication equipment, belonging to the field of data processing, specifically including a data controller, a data extractor, a first shift register group and a neural network calculation unit, the data controller according to the configuration information and instruction information to adjust the data path, and control the data extractor to extract feature row data and convolution kernel row data from the feature map data of the image to be processed by row; the first shift register group adopts serial input and parallel output output the feature row data to the neural network computing unit; the neural network computing unit performs multiplication and accumulation operations on the input feature row data and the convolution kernel row data to complete a convolution The convolution operation of the kernel and the feature map data, and the accumulation of multiple convolution results are completed in at least one cycle, so as to realize circuit reconstruction and data multiplexing.

Description

technical field [0001] The invention relates to the field of data processing, in particular to a neural network calculation module, method and communication equipment. Background technique [0002] A convolutional neural network consists of an input layer (input layer), any number of hidden layers (hidden layers) as intermediate layers, and an output layer (output layer). The input layer (inputlayer) has multiple input nodes (neurons). The output layer has output nodes (neurons) that recognize the number of objects. [0003] The convolution kernel is a small window set in the hidden layer, which holds the weight parameters. The convolution kernel slides sequentially on the input image according to the step size, and performs multiplication and addition operations with the input feature image of the corresponding area, that is, the weight parameter in the convolution kernel and the value of the corresponding input image are first multiplied and then summed. The traditional...

AI Technical Summary

Problems solved by technology

The traditional convolution acceleration operation device needs to use the img2col method to expand the input feature map data and convolution kernel data in matrix form according to the convolution kernel size and step size parameters, and then perform operations on the expanded matrix, so that it can be calculated according to the matrix The multiplication operation rule performs convolution acceleration, but this method requires a larger on-chip cache after the feature data matrix is ​​expanded, and similarly requires more off-chip main memory reading frequency and cannot efficiently multiplex the read data. It needs to occupy the read and write bandwidth of the off-chip memory and increase the hardware power consumption. At the same time, the convolution acceleration method based on the img2col expansion method is not conducive to the hardware logic circuit implementation of the convolution operation of different sizes of convolution kernels and step sizes. Therefore, In the process of convolution network operation, each input channel needs to perform convolution matrix operation with multiple convolution kernels, and the feature map data needs to be acquired multiple times; and all feature map data on each channel are all cached in the buffer , the amount of data is not only huge, but also when the convolution matrix is ​​calculated, since the size of the feature data after matrix conversion is far greater than the size of the original feature data, not only will the on-chip storage resources be wasted, so it is impossible to perform large-scale operations

Images