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Chemical mechanical polishing solution, semiconductor structure and preparation method thereof

A chemical mechanical and polishing liquid technology, applied in chemical mechanical polishing liquid, semiconductor equipment and its preparation, chemical mechanical polishing equipment field, can solve the problems of particle residue, polysilicon scratches, affecting the yield of semiconductor devices, etc.

Inactive Publication Date: 2021-10-22
CHANGXIN MEMORY TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In a typical polysilicon (poly) chemical mechanical polishing process (CMP process), an alkaline silicon dioxide polishing solution is used for planarization. After planarization and cleaning to remove particles, there will be particles on the surface of polysilicon, and, due to mechanical force During the planarization process, there will be scratches on the surface of polysilicon, and the appearance of particles and scratches will affect the yield of semiconductor devices

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  • Chemical mechanical polishing solution, semiconductor structure and preparation method thereof
  • Chemical mechanical polishing solution, semiconductor structure and preparation method thereof
  • Chemical mechanical polishing solution, semiconductor structure and preparation method thereof

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Embodiment Construction

[0041] In order to facilitate understanding of the embodiments of the present application, the following will describe the embodiments of the present application more comprehensively with reference to related drawings. A preferred embodiment of the embodiments of the application is given in the accompanying drawings. However, the embodiments of the present application can be implemented in many different forms, and are not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the embodiments of the present application more thorough and comprehensive.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the embodiments of this application. The terms used herein in the description of the embodiments of the present application are only for the purpose of describing specific emb...

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Abstract

The embodiment of the invention relates to a chemical mechanical polishing solution, chemical mechanical polishing equipment, a semiconductor structure and a preparation method thereof. The chemical mechanical polishing solution is used for thinning a polycrystalline silicon structure to obtain a polycrystalline silicon layer with a flat surface, and comprises silicon dioxide grinding particles, a peroxy compound and deionized water, wherein the volume percentage of the peroxy compound is not less than 3% and not more than 10%. In the process of thinning a polycrystalline silicon structure through chemical mechanical polishing, polycrystalline silicon making contact with chemical mechanical polishing liquid is oxidized into silicon dioxide through the peroxy compound, the contact angle of the chemical mechanical polishing solution is reduced, the grinding effect is improved, the cleaning effect after chemical mechanical grinding is improved, and the production cost is reduced; and meanwhile, the peroxy compound can reduce the friction force between the chemical mechanical polishing solution and the polycrystalline silicon structure, so that scratches on the surface of the polycrystalline silicon structure are reduced, and a polycrystalline silicon layer with few surface particles and scratches is obtained.

Description

technical field [0001] The embodiments of the present application relate to the technical field of semiconductors, in particular to a chemical mechanical polishing liquid, a chemical mechanical polishing device, a semiconductor device and a preparation method thereof. Background technique [0002] With the development of the semiconductor industry, the size of electronic devices is gradually shrinking, and the flatness of the wafer surface is required to reach the nanometer level. Traditional planarization techniques can only achieve local planarization, and global planarization must be performed when the minimum feature size is below 0.25 microns. Common planarization techniques include heat flow method, rotating glass method, etch-back method, electron surround resonance method, selective deposition method, low-pressure plasma-enhanced CVD, deposition-etch-deposition method, etc., all of which are local planarization processes and cannot achieve global planarization. chan...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C09G1/02H01L21/02
CPCC09G1/02H01L21/02013H01L21/3212H01L21/30625
Inventor 蔡长益
Owner CHANGXIN MEMORY TECH INC
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