Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Integrated circuit

An integrated circuit and electrical connection technology, applied in the field of semiconductor manufacturing, can solve the problem of limited chip bandwidth, achieve the effect of bandwidth optimization and performance improvement

Active Publication Date: 2021-09-21
SHANGHAI BIREN TECH CO LTD
View PDF7 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] The invention provides an integrated circuit, which is used to solve the defect of limited chip bandwidth in the prior art, and realize the chip communication performance optimization scheme

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Integrated circuit
  • Integrated circuit
  • Integrated circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0036] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the present invention. Obviously, the described embodiments are part of the embodiments of the present invention , but not all examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0037] The inventors of the present invention found that the continuous popularization of advanced packaging technology and the continuous upgrading of various communication protocols have brought restrictions on the actual bandwidth of the chip and made the advanced packaging technology face a development bottleneck.

[0038] The inventors of the present invention continue to study advanced ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides an integrated circuit. The integrated circuit comprises a packaging substrate; an interposer packaged on the packaging substrate, wherein a metal interconnection line and an inductance coil are formed in the interposer; and a chip packaged on the interposer. The metal interconnection line is arranged in at least one of the following modes: the metal interconnection line is electrically connected the chip and the packaging substrate; and the metal interconnection line is electrically connecting the chips with one another. The inductance coil does not change the electric connection between the chip and the packaging substrate below, and the inductance coil is arranged in the interposer, so that a middle-level internal inductor which is controllable in inductance value L and quality factor Q and meets the requirement can be realized, the bandwidth loss caused by the link and the solder balls on the whole signal link can be eliminated, and the bandwidth optimization is realized, so that the performance of the whole communication link can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an integrated circuit. Background technique [0002] Integrated circuit packaging (English: integrated circuit packaging), referred to as packaging, is the final stage of semiconductor device manufacturing, after which integrated circuit performance testing will be performed. The core die of the device is packaged in a support, which can prevent physical damage (such as bumps and scratches) and chemical corrosion, and provides external connection pins, which facilitates the chip to be installed in the circuit system. [0003] Therefore, packaging is a process of arranging, pasting, fixing and connecting chips and other elements on a frame or substrate, leading out terminals and potting and fixing them through plastic insulating media to form an overall structure. [0004] Advanced packaging technology is an existing packaging technology. The chip is connected...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/522H01L23/528H01L23/488
CPCH01L23/5227H01L23/5226H01L23/5283H01L24/13H01L2224/13009
Inventor 不公告发明人
Owner SHANGHAI BIREN TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com