Cellular structure of silicon carbide MOSFET device, and power semiconductor device

A technology of silicon carbide and cells, which is applied in the direction of semiconductor devices, transistors, electrical components, etc., can solve the problems of increasing the cost of module packaging and the decline of module electrical performance, so as to improve the utilization rate of device area, improve the degradation of electrical characteristics, increase the The effect of power density

Active Publication Date: 2021-06-29
ZHUZHOU CRRC TIMES SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Under normal circumstances, anti-parallel SBD at the chip level will increase the cost of module packaging and will introduce additional bonding wires and stray inductance at the SBD end, resulting in a decline in the electrical performance of the module

Method used

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  • Cellular structure of silicon carbide MOSFET device, and power semiconductor device
  • Cellular structure of silicon carbide MOSFET device, and power semiconductor device
  • Cellular structure of silicon carbide MOSFET device, and power semiconductor device

Examples

Experimental program
Comparison scheme
Effect test

no. 1 example

[0049] figure 2 The schematic diagram of the cell structure of the three-dimensional MOSFET device integrated with SBD for this embodiment, such as figure 2 As shown, it includes: the first conductivity type substrate layer 2, the first conductivity type drift region 3, the second conductivity type well region 4, the first JFET region 51, the second JFET region 52, the first conductivity type enhancement region 6, the second conductivity type Two-conductivity-type enhanced region 7 , gate insulating layer 8 , gate 9 , source metal 10 , Schottky metal 11 , and drain metal 12 .

[0050] image 3 The overall top view of the cell structure of the three-dimensional MOSFET device integrated with SBD for this embodiment;

[0051] Figure 4 It is a cross-sectional top view of the surface of the cellular structure drift region of the MOSFET device of the example of the present invention;

[0052] Figure 5 It is the cross-sectional view of the three-dimensional MOSFET cell struc...

no. 2 example

[0093] The present invention also provides a silicon carbide MOSFET power semiconductor device, the power semiconductor device is provided with a cell structure of a silicon carbide MOSFET device according to any one of the above contents; wherein, the shape of the cell structure is strip, quadrangular or hexagonal polygon.

[0094] In summary,

[0095] In this embodiment, by integrating the SBD in the cell, it is unnecessary to repackage the SBD when the module is packaged, which reduces the parasitic inductance of the bonding wire and the cost of the module package.

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Abstract

The invention discloses a cellular structure of a silicon carbide MOSFET device. The cellular structure comprises a drift region positioned on a substrate layer, a second conductive type well region and a first JFET region which are positioned in the drift region, an enhancement region positioned in the surface of the well region, a gate insulation layer located on the first conductivity type enhancement region, the well region and the first JFET region and making contact with the first conductivity type enhancement region, the well region and the first JFET region at the same time, a gate on the gate insulation layer, a source metal located on the enhancement region, Schottky metals located on the second conductivity type enhancement region and the drift region, a second JFET region located on the surface of the drift region between the Schottky metals, and a drain metal. An SBD is integrated in the silicon carbide MOSFET cellular structure, so opening of a body diode is restrained, and the reliability of the device is improved; the SBD is integrated between the second conduction type enhancement regions of the MOSFET cellular structure, so the overall power density of the chip is increased; and Schottky metal and the second JFET region are arranged at intervals, so a good compromise relationship between the on resistance and the leakage current is realized.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, in particular to a cell structure of a silicon carbide metal oxide semiconductor field effect transistor (MOSFET) device integrated with a Schottky diode (SBD) and a power semiconductor device. Background technique [0002] With the development of energy saving and emission reduction, new energy grid connection, and smart grid, the third-generation semiconductor silicon carbide (SiC) power devices have been paid more and more attention. Its main advantage is that its breakdown electric field strength is 10 times that of traditional silicon devices, or the same Under the voltage / current level, the specific on-resistance is nearly one-thousandth of that of silicon devices. The switching frequency of SiC devices is 20 times that of silicon devices, which can reduce the volume of energy storage components in the circuit. In theory, SiC devices can work in a high temperature environment abo...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/06H01L27/088
CPCH01L29/7806H01L29/0638H01L29/0696H01L27/088H01L29/0878H01L29/66068H01L29/1608H01L29/872H01L29/0619H01L29/0603Y02B70/10
Inventor 王亚飞陈喜明郑昌伟焦莎莎李诚瞻罗海辉
Owner ZHUZHOU CRRC TIMES SEMICON CO LTD
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