Serdes interface circuit

Abstract

The invention provides a Serdes interface circuit, and the circuit comprises a plurality of receiving network bridge units; each receiving network bridge unit comprises an alignment adjustment moduleused for receiving decoded data decoded in each channel of a Serdes interface, adjusting the decoded data to an alignment state and outputting alignment state data; a compensation frequency differencedeleting module which is used for deleting the special character skip pattern in the alignment state data and writing the compensation frequency difference deleting data into the FIFO cache; a data adjustment module which is used for performing data adjustment on the read-out data of the FIFO and outputting adjustment data; a frequency difference compensation module which is used for performing insertion operation on the adjustment data and outputting alignment adjustment data; and a state generation module which is used for controlling multi-channel alignment and judging whether alignment iscompleted or not. According to the interface circuit disclosed by the invention, the influence of the change of special character Apattern intervals in each channel caused by error codes is eliminated, the smooth completion of data alignment is ensured, and the transmission performance of serdes and the stability of system work are improved.

Description

【Technical field】 [0001] The invention relates to the technical field of integrated circuit chips, in particular to a Serdes interface circuit. 【Background technique】 [0002] In order to achieve a higher data rate through fewer pins, the FPGA chip uses multiple channels for data transmission through the Serdes interface. [0003] The PCS rx part in Serdes uses the special character Apattern in the data stream to bind multiple physically independent channels into a parallel channel that is logically synchronized in timing; at the same time, the elastic buffer circuit planned in PCS rx can solve the problem of recovering clocks and local clocks. Inconsistent issues. However, the multi-channel data alignment, recovery clock and local clock frequency difference compensation functions are slow to implement, and the multi-channel alignment function needs to be restarted, which consumes a lot of processing delay and greatly affects the transmission efficiency of the entire serdes...

AI Technical Summary

Problems solved by technology

However, multi-channel data alignment, recovered clock and local clock frequency difference compensation functions are slow to implement, and the multi-channel alignment function needs to be restarted, which consumes a lot of processing delay and greatly affects the transmission efficiency of the entire serdes

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