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An error recovery method for multiprocessor chips based on three-mode lockstep

An error recovery and multi-processor technology, applied in the computer field, can solve the problems of undetected and undetermined hard errors, and achieve the effects of reducing resource consumption, improving reliability and real-time performance

Active Publication Date: 2022-01-21
FOSHAN POWER SUPPLY BUREAU GUANGDONG POWER GRID
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  • Summary
  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

However, this method cannot determine the specific error CPU, and has no ability to detect hard errors.

Method used

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  • An error recovery method for multiprocessor chips based on three-mode lockstep
  • An error recovery method for multiprocessor chips based on three-mode lockstep
  • An error recovery method for multiprocessor chips based on three-mode lockstep

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Embodiment 1

[0038] This embodiment provides a multi-processor chip error recovery method based on three-mode lockstep, such as Figures 1 to 4 , including the following steps:

[0039] S1: Use the check module to compare the outputs of the master processor and the first slave processor. When the outputs of the master processor and the first slave processor are inconsistent, the check module generates an interrupt instruction, and the master processor and the first slave processor perform error recovery operations;

[0040] S2: The second slave processor executes the checkpoint operation, and saves its own processor state into the memory;

[0041] S3: Set the second slave processor to lockstep mode, the input is obtained from the main processor, and the output is sent to the inspection module;

[0042] S4: loading the main processor state saved in the memory to the main processor, the first slave processor and the second slave processor;

[0043] S5: The checking module compares the out...

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Abstract

The invention discloses a multi-processor chip error recovery method based on three-mode lockstep. The dual-core lockstep structure based on checkpoint rollback error recovery can quickly check out the wrong CPU through the second slave processor, and can also be performed through subsequent operations. It has a certain ability to detect CPU hard errors, greatly improves the reliability and real-time performance of processor error handling, and at the same time reduces the resource consumption of the three-mode lockstep.

Description

technical field [0001] The present invention relates to the field of computer technology, more specifically, to a multi-processor chip error recovery method based on three-mode lockstep. Background technique [0002] With the continuous shrinking of the process nodes of integrated circuits, the reliability of integrated circuits has increasingly become the focus of attention, and the appearance of soft errors is an important factor affecting the reliability of integrated circuits. So-called soft errors, also known as single-event upsets, occur when a transistor is bombarded by high-energy charged particles, such as neutrons from cosmic rays and alpha ions from packaging materials, which alter the charge stored in the PN junction, causing The logical state of the data changes, such as flipping between 01. This inversion will cause a logic fault in the circuit, thereby affecting the normal use of the circuit. Compared with hard errors caused by permanent device damage, soft ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/14G06F9/50
CPCG06F11/1441G06F9/5027
Inventor 陈道品罗春风武利会何子兰倪伟东黄凯张铖洪蒋小文张晓旭刘智力
Owner FOSHAN POWER SUPPLY BUREAU GUANGDONG POWER GRID
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