TSPC trigger, dual-mode prescaler and related devices of frequency divider

A dual-mode prescaler and flip-flop technology, which is applied in the direction of synchronous pulse counters, etc., can solve the problems of low working speed and low working speed of dual-mode prescaler

Active Publication Date: 2021-01-22
CALTERAH SEMICON TECH SHANGHAI CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, due to the low operating speed of the TSPC flip-flop in the du...

Method used

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  • TSPC trigger, dual-mode prescaler and related devices of frequency divider
  • TSPC trigger, dual-mode prescaler and related devices of frequency divider
  • TSPC trigger, dual-mode prescaler and related devices of frequency divider

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Embodiment Construction

[0076] As in the background art, the existing TSPC flip-flop operates at a relatively low speed, resulting in a relatively low operating speed of the dual-mode prescaler and frequency divider. like figure 2 as shown, figure 2 for figure 1 The structural schematic diagram of a TSPC flip-flop in the shown dual-mode prescaler includes transistors P1 to P9. The inventor has found that when CLK=1 makes transistor P2 turn on, the voltage of the power supply VDD needs to be transmitted to The common terminal of the transistor P1 and the transistor P2 is then transmitted through the turned-on transistor P2, which causes the TSPC flip-flop to operate at a lower speed.

[0077] Based on this, the present invention provides a kind of TSPC flip-flop, dual-mode prescaler and frequency divider, to overcome the above-mentioned problems existing in the prior art, TSPC flip-flop comprises a first stage structure;

[0078] The first level structure includes a first transistor and a second ...

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Abstract

The invention provides a TSPC trigger, a dual-mode prescaler and a frequency divider. The TSPC trigger comprises a first-stage structure, wherein the first-stage structure comprises a first transistorand a second transistor, and the size of the second transistor is larger than that of the first transistor, a first end of the first transistor is connected with a power supply, a grid of the first transistor is connected with a clock signal end, a second end of the first transistor is connected with a first end of the second transistor, a second end of the second transistor is grounded, and a grid of the second transistor is connected with a first signal end. Because the first end of the first transistor connected with the clock signal end is connected with the power supply, compared with the prior art, the TSPC trigger has the advantages that the transistor, namely the first transistor, connected with the clock signal end is closer to the power supply, and when the clock signal input bythe clock signal end controls the first transistor to be conducted, the power supply voltage can be transmitted to the output end of the first-stage structure more quickly, so that the working speedsof the TSPC trigger, the dual-mode prescaler and the frequency divider are increased.

Description

technical field [0001] The invention relates to the technical field of digital circuits, and more specifically, relates to a TSPC flip-flop, a dual-mode prescaler and frequency divider related devices. Background technique [0002] Frequency dividers are often used to convert a high frequency clock signal to a low frequency clock signal. A traditional frequency divider includes multiple cascaded dual-mode prescalers, and the dual-mode prescaler performs 2 / 3 frequency division according to a frequency division mode control signal selection. By separately controlling each dual-mode prescaler in multiple cascaded dual-mode prescalers to divide by 2 / 3, the high-frequency clock signal can be converted into a low-frequency clock signal with a specified frequency division multiple. [0003] like figure 1 As shown, an existing dual-mode prescaler includes four latches Latch1~Latch4 and three AND gates AND1~AND3, wherein the latch Latch1 and the latch Latch2 form a TSPC TSPC (True ...

Claims

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Application Information

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IPC IPC(8): H03K23/44
CPCH03K23/44Y02B70/10
Inventor 杨建伟
Owner CALTERAH SEMICON TECH SHANGHAI CO LTD
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