Test structure and its test method

Abstract

The invention provides a test structure and a test method thereof. A first metal layer is arranged below a passivation layer; a first conductive path and a second conductive path are formed in the first metal layer; the first metal layer is further filled with a dielectric layer allowing alkali ions to diffuse, so that whether the alkali ions diffuse in the dielectric layer between the first conductive path and the second conductive path or not can be judged through an electrical test, and then whether the passivation layer is broken or not can be deduced. According to the test structure provided by the invention, the integrity of the passivation layer can be sensitively detected, and the stress of the passivation layer can be evaluated by adjusting the circuit layout of the first metal layer.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a test structure and a test method thereof. Background technique [0002] In semiconductor manufacturing, in order to protect the chip from external environmental moisture, ionic contamination, chemical hazards and mechanical stress, a passivation layer (Passivation) is usually deposited on the surface of the chip to isolate the structure below the passivation layer Protect. However, relatively large internal stress is often generated in the passivation layer, and the passivation layer is easily broken under the relatively large internal stress. [0003] In the current common semiconductor manufacturing process, there is no corresponding test structure to detect whether the passivation layer is cracked, and there is no suitable test structure for evaluating the internal stress of the passivation layer. Contents of the invention [0004] The purpose of the present inven...

AI Technical Summary

Problems solved by technology

However, a large internal stress is often generated in the passivation layer, and it is easy to cause the passivation layer to break under the large internal stress.

[0003] In the current common semiconductor manufacturing process, there is no corresponding test structure to detect whether the passivation layer is cracked, and there is no suitable test structure for evaluating the internal stress of the passivation layer

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