Data transmission device and method

Abstract

The invention provides a data transmission device which comprises: a control logic which is used for generating a corresponding control signal according to configuration information for controlling action of other modules; a memory bank interface logic which is used for reading data from a memory bank or writing data into the memory bank; a first selection logic which is used for selecting a datatransmission path corresponding to a forward transmission mode or a data receiving path corresponding to a reverse transmission mode; a data alignment logic which is used for carrying out alignment operation on transmitted data; a recombination module which is used for carrying out recombination operation on the transmitted data so as to split the data blocks read from the memory bank into data components and recombine the data blocks into new data blocks and then transmit the new data blocks to the on-chip memory structure for processing, or split the data blocks processed by the on-chip memory structure into data components and recombine the data blocks into data blocks to be written into the memory bank; a second selection logic which is used for selecting a data receiving path corresponding to the forward transmission mode or a data transmission path corresponding to the reverse transmission mode; and a data routing logic which is used to determine a destination address of the data transmission.

Description

technical field [0001] The present invention relates to the technical field of computer hardware processing, specifically, to a data transmission structure in a single-core or multi-core processor including multiple parallel computing units, and more specifically, to a reconfigurable data transmission device and transmission method . Background technique [0002] In high-throughput data processing scenarios such as scientific computing, big data, and artificial intelligence computing, in order to tap the parallelism of specific applications, multiple micro-processing cores are usually used in the processor, and multiple parallel processing cores are designed in each micro-processing core. The calculation unit adopts this structure to process data of multiple components at one time, thereby effectively improving the processing rate and effectively meeting the concurrent processing requirements for data. In order to give full play to the computing power of the processing unit...

AI Technical Summary

Problems solved by technology

It can be seen that the existing data transmission structure does not process the data in the middle of the data transmission process, and the work of processing data into data components is either completed by the host or by the on-chip storage structure. It is still an on-chip storage structure to perform the operation of processing data into data components, and there will be problems such as time-consuming, reduced flexibility, and affecting processor performance.

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