Multi-channel data real-time sorting method and system
A sorting method and multi-channel technology, applied in multi-channel program devices, electrical digital data processing, program synchronization, etc., can solve the problem of high time complexity, improve system integration, complete output events, and occupy less resources. Effect
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Embodiment 1
[0034] This embodiment is based on the FPGA-based real-time sorting method for multi-channel data, and the specific process is:
[0035] S1. When processing the electronic signal output of multiple detectors, design the token ring to convert the data packets of the events read by the electronic part from multiple channels to one channel, and store the data in the data register.
[0036] S2. Extract the data time stamp information in the data register.
[0037] S3. Delay the data by using the cache register, and obtain the timestamp of each event in the cache register;
[0038] S4. Compare and update the time stamp of the event in the data register with the time stamp of the event in the cache register, update the events in the cache memory according to the new time series order, complete the sorting in the cache memory group and save the event with the smallest time Output and identify.
[0039] S5. For the output result, time window matching can be further performed with th...
Embodiment 2
[0043] This embodiment also provides an FPGA-based multi-channel data real-time sorting system, including:
[0044] The token ring polling structure is used to receive the output data frame of the multi-channel detector electronics readout system, read the detection channels with valid events successively according to the order of packing time, and convert the multi-channel output into a single channel data output. At this time, the Token Ring cannot implement effective sequential reading for events that are relatively close in time, and can only have a certain time correlation, and the cache module needs to correct the sequence.
[0045] Specifically, there are two design ideas for the token ring polling structure, which are:
[0046] A: First come, first read: For multiple inputs, which one arrives first and which one outputs data first, it is usually implemented with FIFO (First Input First Output) in FPGA;
[0047] B: Polling: For multi-channel input numbers, access and ...
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