Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Low-power-consumption and high-reliability trench silicon carbide MOSFET device

A reliable, trench-type technology, applied to semiconductor devices, electrical components, circuits, etc., can solve problems such as weak short-circuit capability, high switching loss, and large gate-to-drain capacitance, so as to reduce saturation current, improve short-circuit capability, and reduce The Effect of Switching Losses

Active Publication Date: 2019-11-29
UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF3 Cites 8 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the P+ shielding layer at the bottom of the trench gate can strongly protect the oxide layer at the bottom and corners of the trench gate, the oxide layer on the sidewall of the trench will still be challenged by a high electric field in the blocking state, so the P+ shielding layer The introduction cannot completely solve the reliability problem that the trench gate oxide layer is impacted by high electric field
[0005] Due to the poor interface state between the current silicon carbide material and the gate oxide dielectric, the channel mobility is too low, and the conduction characteristics of the trench gate silicon carbide MOSFET are still far from the theoretical limit.
Due to the large gate-to-drain capacitance of the trench-gate SiC MOSFET, its switching loss is high
At the same time, due to its high current saturation current, its short-circuit capability is weak

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low-power-consumption and high-reliability trench silicon carbide MOSFET device
  • Low-power-consumption and high-reliability trench silicon carbide MOSFET device
  • Low-power-consumption and high-reliability trench silicon carbide MOSFET device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] Such as figure 2 As shown, a trench silicon carbide MOSFET device with low power consumption and high reliability of this embodiment includes: an N-type substrate 11, an N-type epitaxial layer 10 located above the N-type substrate 11, and an N-type epitaxial layer The second P-body area 9 above the layer 10, the second P+ contact area 7 and the second N+ contact area 8 located inside the second P-body area 9, the second P+ contact area 7 and the second N+ contact area 8 The upper source electrode 1, the gate dielectric 6 located above the second N+ contact region 8, and the trench gate inside the gate dielectric 6, the first P-body region 5 located between the gate dielectrics 6, and the first P-body region 5 the two first N+ contact regions 4 above, the first P+ contact region 3 between the two first N+ contact regions 4, the source electrode 1 located above the first P+ contact region 3 and the first N+ contact region 4 The drain electrode 12 is located under the devi...

Embodiment 2

[0030] Such as image 3 As shown, the difference between the device structure of this embodiment and Embodiment 1 is that the trench gate 2 and the gate dielectric 6 are in an inverted L shape, and the inverted L shape includes a horizontal section and a vertical section connected below the horizontal section. An N-type epitaxial layer 10 is provided between a P-body region 5 and the gate dielectrics 6 on both sides. The horizontal sections of the trench gate 2 and the gate dielectric 6 are located in the first N+ contact region 4, the first P-body region 5 and N Above the type epitaxial layer 10, a gate dielectric 6 is provided between the trench gate 2 and the first N+ contact area 4, the first P-body area 5, and the N type epitaxial layer 10.

Embodiment 3

[0032] Such as Figure 4 As shown, two first P-body regions 5 are provided between the gate dielectric 6, two first P+ contact regions 3 are provided between the two first N+ contact regions 4, and one of the two first P+ contact regions 3 An N-type epitaxial layer 10 is provided between and between the two first P-body regions 5, and the N-type epitaxial layer 10 forms a Schottky contact with the source electrode 1. The advantage of this is that the performance of the third quadrant of the device is improved.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a low-power-consumption and high-reliability trench silicon carbide MOSFET device which comprises an N-type substrate, an N-type epitaxial layer, a first P-Body region, first P+ contact region, a first N + contact region, a second P- body region, a second P + contact region, a second N + contact region, an oxide layer, a groove grid, a metal electrode and drain electrode. According to the SiC MOSFET device, the on-resistance can be significantly reduced through the parallel connection of four channels, and the reliability of the oxide layer of the device can be enhancedand partial gate leakage capacitance can be shielded through wrapping and protection of the second P- body to the groove grid so that the switching loss of the device can be reduced. When the deviceis short-circuited, the JFET region formed by the first P- body region and the Second P- body region is cut off so as to reduce the saturation current of the device and improve its short-circuit capability.

Description

Technical field [0001] The invention belongs to the technical field of power semiconductor devices, and in particular is a trench silicon carbide MOSFET device with low power consumption and high reliability. Background technique [0002] As one of the representatives of the third-generation wide-bandgap semiconductor materials, silicon carbide (Silicon Carbide) material has a large forbidden band width (3.26eV) and a high critical electric field (3×10 6 V / cm), high carrier saturation drift velocity (2×10 7 cm / s), high thermal conductivity (490W / Mk), and good thermal stability. It is an excellent material for the preparation of high-voltage power electronic devices. It has a broad field of high-power, high-temperature, high-pressure and radiation-resistant power electronics. Application prospects. [0003] MOSFET is the most widely used gate control device structure in silicon carbide power devices. Since the silicon carbide MOSFET is a device characterized by a unipolar transport...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/10H01L29/06H01L29/16H01L29/78
CPCH01L29/7827H01L29/1037H01L29/0684H01L29/1608H01L29/7813H01L29/7806H01L29/42376H01L29/41766
Inventor 李轩徐晓杰黄伟陈致宇邓小川张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products