Isolation structure and method for fabricating same

Abstract

The invention discloses an isolation structure and a method for fabricating the same. The isolation structure is disposed between fin transistors of a magnetic random access memory device and includesa fin line substrate. A trench spans the fin line substrate. An oxide layer is disposed on the fin line substrate outside the trench. A liner layer is disposed on the recessed surface of the trench.A nitride layer is disposed on the liner layer and partially fills the trench. The oxide residue is located on the nitride layer at the bottom within the trench. A gate-like structure is disposed on the oxide layer and completely fills the trench.

Description

technical field [0001] The invention relates to a semiconductor element technology, and in particular to an isolation structure of a semiconductor element and its manufacturing technology. Background technique [0002] Based on the need to reduce the size of semiconductor elements, the design of transistors has undergone considerable research and development. For example, a magnetic random access memory (MRAM) device requires a large number of control transistors. The size of the transistor affects the storage capacity of the memory device. [0003] Regarding the design and development of transistors, for example, fin field effect transistors (fin field effect transistors, FinFETs) have been proposed, which can effectively reduce the size of transistors, which is beneficial to form a part of memory cells of random access memory. [0004] A large number of memory cells are usually planned as a single or multiple memory cell unit, which need to be isolated. For MRAM using f...

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Problems solved by technology

However, the size of the shallow trench isolation (STI) structure is still too large

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