Double-sided passivation contact P-type high-efficiency battery and preparation method thereof
A double-sided passivation, high-efficiency technology, used in circuits, electrical components, final product manufacturing, etc., can solve problems such as open-circuit voltage short-circuit current loss, limiting PERC cell efficiency, and low battery fill factor, reducing compounding, improving The effect of cell conversion efficiency, good surface passivation
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[0033] A method for preparing a P-type high-efficiency battery with double-sided passivation contact, comprising the following steps: S1. Washing and making texture: After cleaning P-type monocrystalline silicon 1, a special textured structure is prepared, and the textured structure includes pyramids and inverted textures. Pyramid-shaped, control the surface reflectance of P-type monocrystalline silicon 1 at 9-11%;
[0034] S2. Preparation of front polysilicon: prepare a front ultra-thin silicon oxide layer 2 and a layer of N-type polysilicon layer 3 on the front of the P-type monocrystalline silicon 1 that has been prepared with a textured surface. The thickness of the front ultra-thin silicon oxide layer 2 is controlled at 1-2nm, which is prepared by hot HNO3 solution oxidation or dry oxidation method, and the thickness of N-type polysilicon layer 3 is controlled at 30-50nm, which is prepared by PECVD method;
[0035] S3. Prepare a mask: prepare a layer of mask on the surfac...
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[0044] A method for preparing a P-type high-efficiency battery with double-sided passivation contact, comprising the following steps:
[0045] S1. Cleaning and making texture: the P-type monocrystalline silicon 1 is cleaned to prepare a special textured structure, the textured structure includes a pyramid shape and an inverted pyramid shape, and the surface reflectance of the P-type monocrystalline silicon 1 is controlled at 10%;
[0046] S2. Preparation of front polysilicon: prepare a front ultra-thin silicon oxide layer 2 and a layer of N-type polysilicon layer 3 on the front of the P-type monocrystalline silicon 1 that has been prepared with a textured surface. The thickness of the front ultra-thin silicon oxide layer 2 is controlled at 1nm, which is prepared by a dry oxidation method, and the thickness of the N-type polysilicon layer 3 is controlled at 30nm, which is prepared by a PECVD method;
[0047] S3. Prepare mask: prepare a layer of mask on the surface of N-type polys...
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