Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

High-density interconnect package structure based on bridge chip

A technology of high-density interconnection and packaging structure, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve problems such as the inability to meet the needs of high-density interconnection and the increase of interconnection density, and achieve shortening of processing cycle and integration Flexible, cost-reducing effects

Inactive Publication Date: 2019-04-26
58TH RES INST OF CETC
View PDF4 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a high-density interconnection packaging structure based on bridge chips to solve the problem that the interconnection density inside the current packaging structure increases sharply and cannot meet the needs of high-density interconnection

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • High-density interconnect package structure based on bridge chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] The invention provides a high-density interconnect packaging structure based on bridge chips, the structure of which is as follows: figure 1 shown. The bridge chip-based high-density interconnect package structure includes a body, and the body has a bridge chip 1 and a through-hole structure 2, and the bridge chip 1 and the through-hole structure 2 are formed by a resin filling material 3. The body, the resin filling material 3 surrounds it, but does not cover the functional areas of the bridge chip 1 and the through-hole structure 2 . Preferably, the body is formed by wafer-level fan-out technology. Specifically, the number and position of the bridge chip 1 and the through-hole structure 2 can be freely adjusted according to actual design needs. In the first embodiment, the number of the bridge chips 1 is two, and the number of the through-hole structures 2 is three. Further, the manufacturing process of the bridge chip 1 is preferably a CMOS process.

[0025] Spec...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a high-density interconnect package structure based on a bridge chip, and belongs to the technical field of integrated circuit packaging. The high-density interconnect packagestructure based on the bridge chip includes a body having the bridge chip and a through hole structure therein, the bridge chip and the through hole structure constitute the body by a resin filling material, and the bridge chip and the functional area of the through hole structure are exposed to the outside; the upper surface of the body is formed with a rewiring layer, and the rewiring layer of the upper surface is interconnected with a functional chip by bumps.

Description

technical field [0001] The invention relates to the technical field of integrated circuit packaging, in particular to a bridge chip-based high-density interconnect packaging structure. Background technique [0002] Wafer-level fan-out packaging technology, as a solution to realize electronic system miniaturization and low-cost applications, is currently developing into a major advanced packaging process with high integration flexibility. This technology does not require a substrate, and wafer-level packaging can achieve micron-scale manufacturing accuracy, which meets the urgent needs of modern electronic systems for miniaturization, low cost, and high integration. As a key technology of wafer-level fan-out packaging, rewiring technology realizes the signal interconnection between functional chips and the transfer of signal input and output terminals (I / O). [0003] With the further improvement of the demand for miniaturization of electronic systems, more and more products ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/535H01L23/538
CPCH01L23/535H01L23/5384H01L2924/15192H01L2224/16227H01L2924/15311
Inventor 王波明雪飞高娜燕
Owner 58TH RES INST OF CETC
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products