Anti-radiation D latch

Abstract

The invention discloses an anti-radiation D latch, belongs to the field of anti-nuclear reinforcement in integrated circuit reliability, and solves the problems that the traditional anti-radiation D latch needs more hardware and is high in power consumption and long in delay time, the double-node upset can be resisted, but the double-node upset resistance is poor, and even the fault tolerance of the double-node upset cannot be achieved. The anti-radiation D latch comprises NMOS transistors N1 to N16, PMOS transistors P1 to P16 and two inverters I1 and I2. The anti-radiation D latch is few in used devices, small in size and simple in structure, so that the power consumption of the whole latch is reduced and the latch has low hardware expenditure. A signal at the input end of the latch can be transmitted to an output port only through one transmission gate, the data transmission time is short, and the fault tolerance for upset of any single node and the two nodes can be achieved, and thus the fault-tolerant protection of the single-node upset resistance and the double-node upset resistance is achieved. The anti-radiation D latch can provide protection for application of an integratedcircuit chip in a high-radiation environment (such as aerospace and ground nuclear power stations).

Description

technical field [0001] The invention belongs to the field of anti-radiation reinforcement in integrated circuit reliability. Background technique [0002] In digital integrated circuits, D latches can be used to form sequential circuits such as flip-flops and registers, and are one of the important components of digital integrated circuits. Therefore, its reliability is of paramount importance. The D latch has the function of storing data. Once the stored data is affected by external radiation and an error occurs, it will affect the correctness of subsequent circuit functions. Therefore, it is very necessary to strengthen the D latch against radiation. The traditional anti-radiation D latch is generally reinforced by triple-mode redundancy. The disadvantages are that it requires more hardware (up to 102 transistors), high power consumption, long delay time, and although it can achieve anti-double node flipping, However, the ability to resist double-node flipping is poor, a...

AI Technical Summary

Problems solved by technology

[0003] The present invention aims to solve the problem that the traditional anti-radiation D latch needs more hardware, high power consumption, long delay time, and although it can realize anti-double-node flipping, it has poor anti-dual-node flipping ability, and even cannot realize double-node flipping. For the fault tolerance problem of node flipping, the present invention provides an anti-irradiation D latch

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