Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Power device protection chip and preparation method thereof

A technology for protecting chips and power devices, applied in the field of power device protection chips and their preparation, can solve the problems of large attenuation of circuit signals, affecting circuit stability, etc., and achieve the effects of reducing parasitic capacitance, reducing manufacturing costs, and reducing packaging area

Active Publication Date: 2019-01-18
SHENZHEN MYD INFORMATION TECH CO LTD
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In high-frequency circuits, because the surge protection chip also has parasitic capacitance, the signal attenuation of the circuit is relatively large, and even the stability of the entire circuit is affected.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Power device protection chip and preparation method thereof
  • Power device protection chip and preparation method thereof
  • Power device protection chip and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0025] In order to understand the specific technical solutions, features and advantages of the present invention more clearly, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0026] In the description of the present invention, it should be noted that the terms "upper", "lower", "left", "right", "horizontal", "longitudinal", "horizontal", "inner", "outer" and the like indicate The orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product of the invention is usually placed in use, only for the convenience of describing the present invention and simplifying the description, rather than indicating or implied. The device or element referred to must have a particular orientation, be constructed and operate in a particular orientation, and therefore should not be co...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a power device protection chip, which comprises a substrate; an epitaxial layer formed on the substrate; rectifying regions formed in the epitaxial layer and spaced apart from each other, the rectifying region includes a first trench formed from an upper surface of the epitaxial layer into the epitaxial layer, a second trench formed from the bottom of the first trench into the epitaxial layer and a third trench formed from the bottom of the second trench into the epitaxial layer, the first trench, the second trench and the third trench are communicated with each other and the width decreases in turn. the first trench, the second trench and the third trench are filled with the first metal layer, and the schottky barrier height between the first metal layer and the epitaxial layer in the first trench, the second trench and the third trench decreases in turn. the isolation region is located between that two rectify regions and extend from the upper surface of the epitaxial layer to the substrate, the isolation region including a fourth trench and a second metal layer filled with the fourth trench in ohmic contact with the substrate. The invention also provides apreparation method of a power device protection chip, which enhances the stability type, reduces the package area and the preparation cost.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a power device protection chip and a preparation method thereof. Background technique [0002] As semiconductor devices move toward miniaturization, high density, and multi-functionality, electronic devices are increasingly susceptible to voltage surges that can induce transient current spikes, ranging from electrostatic discharge to lightning. Electrostatic discharge (ESD) and other random voltage transients in the form of voltage surges are present in various electronic devices. [0003] Surge protection chip is a solid-state semiconductor device specially designed to protect sensitive semiconductor devices from transient voltage surge damage. It has the advantages of small clamping factor, small size, fast response, small leakage current and reliable It has the advantages of high performance, so it has been widely used in voltage transient ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L27/02H01L29/872H01L21/329
CPCH01L27/0255H01L29/66143H01L29/872
Inventor 不公告发明人
Owner SHENZHEN MYD INFORMATION TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products