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A key circuit cell location method based on embedded parallel genetic algorithm

A technology of circuit unit and genetic algorithm, which is applied in the field of key circuit unit positioning based on genetic algorithm with embedded parallel structure, can solve the problems of difficult positioning accuracy and computational complexity

Active Publication Date: 2019-01-04
ZHEJIANG UNIV OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, existing methods are often difficult to effectively achieve the unification of positioning accuracy and computational complexity.
The analysis found that although the existing analysis methods based on evolutionary strategies are still insufficient, they are still a promising research method and have attracted the attention of the industry

Method used

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  • A key circuit cell location method based on embedded parallel genetic algorithm
  • A key circuit cell location method based on embedded parallel genetic algorithm

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Experimental program
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Effect test

Embodiment 1

[0097] Taking the sub-circuits C17-22, C17-23, 74155-41, 74157-39 and 74182-63 in the ISCAS 85 and 74 series circuits as examples, the order of the key circuit units in the above circuits is given in descending order.

[0098] Step 1: Netlist analysis and initialization of related quantities

[0099] 1.1. Read the circuit subnet list and establish the corresponding integrity linked list LC. Among them, LC means that the input terminal information of any node in the linked list can be extracted from the output terminal information of the previous node of the node;

[0100] 1.2. Extract the original input terminal and circuit unit of the circuit, and for all N LC A circuit unit implements binary encoding and initializes a loop variable i =1, the number of experiment repetitions Nsm =10, the evolutionary algebra of genetic algorithm NGE =100, and population size nps =10.

[0101] Step 2: Construct an initialization population oriented to key circuit units and initialize ...

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Abstract

The invention relates to a key circuit unit positioning method based on an embedded parallel structure genetic algorithm, which belongs to the positioning technology field of key circuit units in integrated circuits. Specifically, the method includes: 1) network table analysis and initialization of related quantities; 2) constructing an initialization population oriented to the key circuit unit and initializing the current evolutionary algebraic variable j=1; 3) building a hall of fame library HG, and storing that b individual in each generation into the HG; 4) if i is greater than Nsm, go tostep 7), otherwise, going to step 5); 5) calculating the diversity div of the population; 6) calculating the key values of each circuit unit in the current HG circuit; 7) calculating the key values ofeach circuit unit in the LC; 8) arranging the key values obtained in the step 7 in descending order and outputting the corresponding circuit units. The invention is helpful for realizing the high reliable design of the circuit structure with less cost and shortening the design period of the circuit.

Description

technical field [0001] The invention belongs to the technical field of locating key circuit units in integrated circuits, and specifically relates to a key circuit unit locating method based on an embedded parallel structure genetic algorithm. Background technique [0002] With the continuous reduction of the feature size of integrated circuits, the reduction of power supply voltage and the increase of operating frequency, the process technology has become more and more complicated, which inevitably leads to a decrease in the reliability tolerance of the circuit, which is not conducive to fast Realize the high reliability design of integrated circuit products. For this reason, the usual practice in the industry is to strengthen the weak devices in the circuit structure, so that the reliability of the circuit structure can be greatly improved at a relatively small cost. This obviously requires an accurate and effective key circuit unit positioning method to assist in achievi...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06N3/12
CPCG06N3/126G06F30/392
Inventor 肖杰施展辉季奇瓯胡海根杨旭华黄玉娇李伟马伟峰
Owner ZHEJIANG UNIV OF TECH
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