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Distributed transparent information processing platform and processing method for low-cost moonlets

An information processing platform and distributed technology, which is applied in the direction of electronic digital data processing, resource allocation, program startup/switching, etc., can solve the problems of incomplete data processing, poor timeliness of data processing, and small amount of data calculation. Processing effects with strong timeliness, fast calculation speed and small size

Inactive Publication Date: 2018-08-28
HARBIN ENG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Traditional small satellites carry an on-board computer with strong data processing capabilities, and adopt a centralized information processing structure. When the components of the on-board computer fail, the on-board computer cannot complete subsequent data processing due to the failure of its capabilities. low performance and poor fault tolerance; when only a few tasks need to be processed, the amount of data calculation is small, and the capacity of the onboard computer is excessive, resulting in waste of resources; in addition, when there are multiple tasks to be processed, the amount of data calculation is large, and tasks need to be queued. Poor processing timeliness

Method used

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  • Distributed transparent information processing platform and processing method for low-cost moonlets
  • Distributed transparent information processing platform and processing method for low-cost moonlets

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specific Embodiment approach 1

[0029] Specific implementation mode 1: Distributed computing based on parallel framework structure. Based on the parallel computing framework, distributed collaborative computing can be performed for multiple tasks of small satellites. Compared with traditional centralized serial computing, distributed parallel computing can save a lot of computing time and ensure the timeliness of tasks.

[0030] to combine figure 1 , The present invention includes k micro on-board computers i=1, 2, ..., k, 1 SpaceWire bus n+1. The SpaceWire bus n+1 is respectively connected to the data input and output ends of k micro-onboard computers i=1, 2, ..., k, so as to realize the data interaction among the k micro-onboard computers.

[0031] The micro-onboard computer 1 acts as the main control machine in the parallel frame structure, and the micro on-board computers 2, 3, . . . , k serve as the emulators in the parallel frame structure. There is one-to-one correspondence between the emulator and ...

specific Embodiment approach 2

[0032] Embodiment 2: On the basis of Embodiment 1, spare micro-onboard computers k+1, ..., n are added to realize the fault tolerance and redundancy of distributed computing. When the micro-onboard computer i corresponding to a certain task, i=1, 2, ..., k fails to work, the micro-onboard computer j, j=2, 3, ..., k, j corresponding to other tasks ≠i is not affected, and can continue to process tasks, realizing the fault tolerance of the system. At the same time, the backup miniature on-board computers j, j=k+1, ..., n corresponding to the above tasks are started and continue to process the tasks, realizing the redundancy of the system and satisfying the distributed parallel computing of the whole system.

specific Embodiment approach 3

[0033] Specific implementation mode 3: On the basis of implementation scheme 2, self-inspection and evaluation calculation amount are ordered according to different tasks to realize system self-organization. The workflow of this implementation mode is as follows figure 2 Shown:

[0034] Inside each miniature on-board computer, XC4V-LX160 FPGA i-1 is connected to PPC-8245 CPU processor i-2 through Link Ports i-6, and XC4V-LX160 FPGA i-1 is connected to PROM i-3 It is connected with Flash i-4, and the data input and output terminals of XC4V-LX160 FPGA i-1 are connected with SpaceWire bus n+1.

[0035] PPC-8245 CPU processor i-2 is connected to XC4V-LX160 FPGA i-1 through Link Ports i-6, and PPC-8245 CPU processor i-2 is connected to PROM i-5 and Flash i-4;

[0036] Flash i-4 is a non-volatile memory with large capacity but lower reliability of on-orbit data than PROM i-3 and i-5, respectively compatible with C4V-LX160 FPGA i-1 and PPC-8245 CPU processor i-2 connected.

[00...

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Abstract

The invention provides a distributed transparent information processing platform and processing method for low-cost moonlets. The platform comprises n on-board microcomputers, a SpaceWire bus n+1, andeach on-board microcomputer comprises an FPGA i-1, a CPU processor i-2, two PROMs i-3 and i-5, a Flash i-4 and a Link Port high-speed serial port. By parallel framework structure based distributed computation for data processing of tasks, computation time can be greatly saved, and task timeliness can be guaranteed. The microcomputers include master control microcomputers, task microcomputers andbackup microcomputers and are in computation independency, and utilization of other microcomputers is unaffected when one of the microcomputers is in fault, so that fault tolerance and redundancy in distributed computation are realized.

Description

technical field [0001] The invention relates to a small satellite distributed and transparent information processing device and processing method, specifically a low-cost small satellite application based on parallel framework technology with fault tolerance, redundancy and self-organization. The satellite distributed information processing module and processing method belong to a part of the distributed satellite platform. Background technique [0002] With the development of micro-satellite technology and the diversification of satellite tasks, more and more tasks need to be processed independently on the satellite, which requires the satellite to have the ability of distributed parallel computing, and have the ability to meet real-time, fault tolerance, redundancy The data processing capability required by the system. Traditional small satellites carry an on-board computer with strong data processing capabilities, and adopt a centralized information processing structure....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/48G06F9/50G06F15/16
CPCG06F9/4881G06F9/5088G06F15/161
Inventor 刘源王硕程建华赵琳赵坤丁继成李亮李慧
Owner HARBIN ENG UNIV
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