Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Configuration code stream-based FPGA fault injection complex model

A fault injection and composite model technology, applied in faulty hardware testing methods, faulty computer hardware, instruments, etc. Can not be ignored, to achieve the effect of flexible use, expanding the scope of research, and improving pertinence

Active Publication Date: 2017-08-25
BEIJING MXTRONICS CORP +1
View PDF5 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] (3) The feature size of the device is reduced and the sensitivity is increased, resulting in the possibility of multi-bit flips that cannot be ignored. The existing fault injection model cannot realize multi-bit flips at one time;
[0007] (4) A single fault injection model is not suitable for the current research on the sensitivity of FPGA single event upset effect with multiple research purposes and multiple types of circuit design

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Configuration code stream-based FPGA fault injection complex model
  • Configuration code stream-based FPGA fault injection complex model

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0035] Such as figure 1 As shown, a composite model of FPGA fault injection based on configuration code stream proposed by the present invention includes space traversal model 1, environment reconstruction model 2, fixed-point precision model 3, resource-oriented model 4 and multi-bit inversion model 5. The functions of each model are as follows:

[0036] (1) Space traversal model: According to user requirements and circuit scale, the entire configuration storage space 1 or part of the configuration storage space 7 (space selected by the user) can be selected as the target of single event flip fault injection. Once the size of the space is determined, the space can be The accessed configuration bits are flipped bit by bit; the frame address and bit offset of the configuration bits in all spaces generally start from 0, the initial frame address is 00000000 (hexadecimal), the initial bit offset is 0, and the traversal range is the same as the device model Related; the starting ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a configuration code stream-based FPGA fault injection complex model. The model comprises a space traversal model, an environment reconstruction model, a fixed point accurate model, a resource guiding model and a multi-bit upset model, wherein the models obtain address information of corresponding target configuration bits on a configuration code stream layer of an FPGA in allusion to different research aims and different circuit designs, and carry out single-event upset fault injection on an FPGA circuit. The complex model disclosed by the invention is capable of estimating the sensitivity, to single-event upset effect, of the FPGA circuit from a plurality of angles such as entirety, locality, different research aims and different circuit types, overcoming the problem that the existing fault injection models are single in application range and application situation, and carrying out single-event upset fault injection on a part of the configuration bits, not all the configuration bits in a targeted manner so as to greatly improve the execution efficiency.

Description

technical field [0001] The invention relates to FPGA single event flipping fault injection, in particular to an FPGA fault injection compound model based on configuration code stream, which belongs to the field of FPGA reliability testing. Background technique [0002] FPGA circuits for space applications are susceptible to single-event upset effects in radiation environments, which can lead to data corruption in SRAM memory cells, thereby changing circuit functionality. The single event flip effect is produced by the impact of high-energy charged particles in the space on the SRAM unit of the FPGA. The mechanism is relatively complicated, and it is characterized in the configuration code stream, which is only manifested as the flip of the logic state of the configuration bit. Due to differences in the incident position of charged particles, particle energy, device technology, and circuit design, the single event inversion effect usually has two forms: one-bit inversion and ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22G06F11/263
CPCG06F11/2273G06F11/263
Inventor 于婷婷陈雷周婧王硕李学武
Owner BEIJING MXTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products