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Array substrate and preparation method thereof, and display panel

A technology for array substrates and substrates, applied in the fields of photoplate-making process coating equipment, photo-plate-making process exposure devices, semiconductor/solid-state device manufacturing, etc., can solve the problem of poor stability of threshold voltage of thin film transistors 20, affecting electron mobility, Issues that affect the performance of thin film transistors

Active Publication Date: 2020-02-18
BOE TECH GRP CO LTD +1
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Existing display panels include array substrates, such as figure 1 As shown, the array substrate includes a thin film transistor 20 and a common electrode 30 disposed on the substrate 10, because the orthographic projection of the common electrode 30 on the substrate 10 covers the active layer 21 of the thin film transistor 20 on the substrate 10. Projection, thereby affecting the mobility of electrons on the active layer 21, causing the stability of the threshold voltage of the thin film transistor 20 to deteriorate, thus affecting the performance of the thin film transistor

Method used

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  • Array substrate and preparation method thereof, and display panel
  • Array substrate and preparation method thereof, and display panel
  • Array substrate and preparation method thereof, and display panel

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Embodiment Construction

[0030] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0031] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by those skilled in the art. "First", "second" and similar words used in the patent application specification and claims of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Likewise, words like "a", "an" or "the" do not indicate a limitation of quantity, but me...

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Abstract

The invention provides an array substrate, a preparation method thereof, and a display panel, which relate to the field of display technology and can reduce the parasitic capacitance between a transparent conductive layer and an active layer. The array substrate includes: a substrate, a thin film transistor arranged on the substrate, and a common electrode including a first hollow part arranged on a side of the thin film transistor away from the substrate; the thin film transistor The active layer includes a source electrode region, a drain electrode region and a channel region, and the orthographic projection of the first hollow part on the substrate at least covers the orthographic projection of the channel region on the substrate.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method thereof, and a display panel. Background technique [0002] In recent years, with the continuous development of various display technologies, such as LCD (Liquid Crystal Display, Liquid Crystal Display) display, OLED (Organic Light-Emitting Diode, Organic Light-Emitting Diode) display, flexible display, transparent display, etc., large-size, Products of high-resolution display panels emerge in an endless stream. [0003] Existing display panels include array substrates, such as figure 1 As shown, the array substrate includes a thin film transistor 20 and a common electrode 30 disposed on the substrate 10, because the orthographic projection of the common electrode 30 on the substrate 10 covers the active layer 21 of the thin film transistor 20 on the substrate 10. Projection, thereby affecting the mobility of electrons on the ac...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/77
CPCH01L27/124H01L27/1259G02F1/1368G02F1/136227G02F1/134363G02F1/13606H01L27/1248H01L27/1288G02F1/13439G03F7/16G03F7/20G03F7/26G02F2201/121G02F1/136236
Inventor 贵炳强曲连杰齐永莲赵合彬邱云
Owner BOE TECH GRP CO LTD
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