Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Solid-state plasma PiN diode of AlAs-Ge-AlAs structure and preparation method of solid-state plasma PiN diode

A technology of alas-ge-alas and plasma, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as incompatibility, low integration, and affecting the carrier concentration of PiN diodes, so as to improve performance, the effect of improving injection efficiency and current

Active Publication Date: 2017-05-31
XIDIAN UNIV
View PDF1 Cites 1 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] At present, the materials used in PiN diodes used in plasma reconfigurable antennas at home and abroad are all bulk silicon materials. This material has the problem of low carrier mobility in the intrinsic region, which affects the carrier concentration in the intrinsic region of the PiN diode, and thus Affect its solid-state plasma concentration; and the P region and N region of this structure are mostly formed by implantation process, which requires a large implant dose and energy, high requirements on equipment, and is incompatible with existing processes; and the diffusion process, Although the junction depth is deep, but at the same time, the area of ​​the P region and the N region is large, the integration degree is low, and the doping concentration is uneven, which affects the electrical performance of the PiN diode, resulting in poor controllability of the solid-state plasma concentration and distribution.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Solid-state plasma PiN diode of AlAs-Ge-AlAs structure and preparation method of solid-state plasma PiN diode
  • Solid-state plasma PiN diode of AlAs-Ge-AlAs structure and preparation method of solid-state plasma PiN diode
  • Solid-state plasma PiN diode of AlAs-Ge-AlAs structure and preparation method of solid-state plasma PiN diode

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0052] See figure 1 , figure 1 It is a flow chart of a method for manufacturing a solid-state plasma PiN diode based on an AlAs-Ge-AlAs structure according to an embodiment of the present invention. The method is suitable for preparing a lateral solid-state plasma PiN diode based on GeOI, and the AlAs-Ge-AlAs structure The base solid-state plasmonic PiN diode is mainly used to make solid-state plasmonic antennas. The method comprises the steps of:

[0053] (a) selecting a GeOI substrate, and setting an isolation region in the GeOI substrate;

[0054] (b) etching the GeOI substrate to form a P-type trench and an N-type trench;

[0055] (c) Deposit AlAs material in the P-type trench and the N-type trench, and carry out ion implantation to the AlAs material in the P-type trench and the N-type trench to form a P-type active region and an N-type active region; and

[0056] (d) forming leads on the surface of the P-type active region and the N-type active region, so as to compl...

Embodiment 2

[0092] See Figure 2a-Figure 2r , Figure 2a-Figure 2r It is a schematic diagram of a method for preparing a solid-state plasma PiN diode with an AlAs-Ge-AlAs structure according to an embodiment of the present invention. On the basis of the above-mentioned embodiment 1, the channel length is 22 nm (the length of the solid-state plasma region is 100 microns) ) AlAs-Ge-AlAs structure-based solid-state plasma PiN diode as an example to describe in detail, the specific steps are as follows:

[0093] Step 1, substrate material preparation steps:

[0094] (1a) if Figure 2a As shown, the (100) crystal orientation is selected, the doping type is p-type, and the doping concentration is 10 14 cm -3 A GeOI substrate sheet 101, the thickness of the top layer Ge is 50 μm;

[0095] (1b) if Figure 2bAs shown, the method of chemical vapor deposition (Chemical vapor deposition, referred to as CVD) is used to deposit a layer of the first SiO with a thickness of 40nm on the GeOI substra...

Embodiment 3

[0123] Please refer to image 3 , image 3 It is a schematic diagram of the device structure of the solid-state plasma PiN diode based on the AlAs-Ge-AlAs structure of the embodiment of the present invention. The AlAs-Ge-AlAs structure-based solid-state plasma PiN diode adopts the above-mentioned figure 1 The preparation method shown is made, specifically, the AlAs-Ge-AlAs structure-based solid-state plasma PiN diode is prepared and formed on the GeOI substrate 301, and the P region 304, the N region 305 of the PiN diode and the P region located laterally on the P The I region between the region 304 and the N region 305 is located in the top Ge layer 302 of the GeOI substrate. Wherein, the PiN diode can be isolated by STI deep trenches, that is, an isolation trench 303 is provided outside the P region 304 and the N region 305 , and the depth of the isolation trench 303 is greater than or equal to the thickness of the top Ge layer 302 .

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to a solid-state plasma PiN diode of an AlAs-Ge-AlAs structure and a preparation method of the solid-state plasma PiN diode. The preparation method comprises the steps of selecting a GeOI substrate and arranging an isolation area in the GeOI substrate; etching the GeOI substrate to form a P-type groove and an N-type groove; depositing AlAs materials into the P-type groove and the N-type groove and carrying out ion implantation on the AlAs materials in the P-type groove and the N-type groove to form a P-type active area and an N-type active area; and forming a lead on the surfaces of the P-type active area and the N-type active area to complete preparation of the solid-state plasma PiN diode of the AlAs-Ge-AlAs structure. The high-performance Ge-based solid-state plasma PiN diode suitable for forming a solid-state plasma antenna can be prepared and provided by adopting a deep groove isolation technology and an ion implantation technology.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to an AlAs-Ge-AlAs-based solid-state plasma PiN diode and a preparation method thereof. Background technique [0002] At present, the materials used in PiN diodes used in plasma reconfigurable antennas at home and abroad are all bulk silicon materials. This material has the problem of low carrier mobility in the intrinsic region, which affects the carrier concentration in the intrinsic region of the PiN diode, and thus Affect its solid-state plasma concentration; and the P region and N region of this structure are mostly formed by implantation process, which requires a large implant dose and energy, high requirements on equipment, and is incompatible with existing processes; and the diffusion process, Although the junction depth is deep, the areas of the P region and the N region are large, the integration degree is low, and the doping concentration is uneven, which affe...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/329H01L29/868
CPCH01L29/6609H01L29/868
Inventor 王斌苏汉阎毅强宣荣喜张鹤鸣宋建军舒斌康海燕
Owner XIDIAN UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com