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CoPtx nano composite structure electromagnetic memory device and preparation method thereof

A storage device and nano-composite technology, applied in the direction of static memory, electric solid device, digital memory information, etc., to achieve the effect of reducing randomness, guaranteeing conformity and controllability, and excellent storage performance

Active Publication Date: 2017-05-31
NANJING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The direct application of ALD deposition technology to the preparation of ultra-high-density FePt / CoPt nano-arrays is still blank

Method used

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  • CoPtx nano composite structure electromagnetic memory device and preparation method thereof
  • CoPtx nano composite structure electromagnetic memory device and preparation method thereof
  • CoPtx nano composite structure electromagnetic memory device and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0039] (1) With the clean silicon wafer 5 as the substrate, the lower electrode 4 is firstly prepared by plasma-enhanced atomic layer deposition, and the lower electrode TiN is prepared. The specific steps are as follows:

[0040] TiN growth temperature is 400°C, with TiCl 4 , NH 3 Plasma is used as Ti source and nitrogen source respectively, where TiCl 4 The pulse time is 0.1 seconds, the carrier gas is high-purity nitrogen (99.999%), and it is used as a cleaning gas at the same time, and the cleaning time is 4 seconds; NH 3 The carrier gas of the plasma is high-purity argon (99.999%), and its pulse time is 24 seconds. The cleaning time of high-purity nitrogen as the cleaning gas is 6 seconds. TiCl 4 The source temperature is room temperature. In this embodiment, the thickness of TiN is 30nm;

[0041] (2) CoPt was grown on the lower electrode TiN layer by plasma-enhanced atomic layer deposition x Magnetic nanocrystalline layer 3;

[0042] CoPt x The nanocrystal growth ...

Embodiment 2

[0053] (1) Using a clean silicon wafer as the substrate, firstly prepare the lower electrode TiN with a thickness of 120 nm by using plasma-enhanced atomic layer deposition, and the preparation method is the same as step (1) in Example 1;

[0054] (2) CoPt was grown on the lower electrode TiN layer by plasma-enhanced atomic layer deposition x Nanocrystals, the preparation method of which is the same as step (2) in Example 1, the cycle ratio of Co:Pt is 1:1, and the number of cycles is 100 cycles;

[0055] (3) Second, hafnium oxide thin film was grown to form the resistive switch layer. The atomic layer deposition process conditions were as follows: the growth temperature was 250°C, tetrakis-(dimethylethylamino hafnium) and secondary deionized water were used as Hf source and oxygen source respectively, each The pulse time of Luyuan is 0.1 seconds, the carrier gas is high-purity nitrogen (99.999%) and it is also used as cleaning gas, and the cleaning time is 4 seconds. Tetra-(...

Embodiment 3

[0063] (1) With a clean silicon wafer as the substrate, the lower electrode TiN was first prepared by plasma-enhanced atomic layer deposition. The specific steps are as follows:

[0064] TiN growth temperature is 400°C, with TiCl 4 , NH 3 Plasma is used as Ti source and nitrogen source respectively, where TiCl 4 The pulse time is 0.1 seconds, the carrier gas is high-purity nitrogen (99.999%), and it is used as a cleaning gas at the same time, and the cleaning time is 4 seconds; NH 3 The carrier gas of the plasma is high-purity argon (99.999%), and its pulse time is 24 seconds. The cleaning time of high-purity nitrogen as the cleaning gas is 6 seconds. TiCl 4 The source temperature is room temperature. In this embodiment, the thickness of TiN is 200nm;

[0065] (2) CoPt was grown on the lower electrode TiN layer by plasma-enhanced atomic layer deposition x nanocrystalline layer;

[0066] CoPt x The nanocrystal growth temperature was 300°C, and the PtMeCpMe 3 , CoCp(CO) ...

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Abstract

The invention discloses a CoPtx nano composite structure electromagnetic memory device. The electromagnetic memory device is of a lamination structure, and the lamination is composed of a silicon chip, a lower electrode, a CoPtx magnetic nano crystal layer, a thin oxide film resistive random layer and an upper electrode sequentially from bottom to top. The memory has an excellent resistive random memory function and a magnetic recording characteristic, and can realize a high-density multimode electromagnetic memory function. The invention also discloses a preparation method of the CoPtx nano composite structure electromagnetic memory device, and the method is based on a preparation technique of an atomic layer deposited multifunctional high-density electromagnetic memory device, is well compatible with a microelectronic process, provides feasibility for future industrialization and large-scale application, can guarantee the uniformity, conformality and controllability of the memory device structure, is compatible with the mature semiconductor process, and is convenient for realizing integration of a high-density multifunctional electromagnetic memory device with a microelectronic device and realizing large-scale industrialized application.

Description

technical field [0001] The invention belongs to the field of micro-nano electronic technology-high-density information storage, and relates to a CoPt x Electromagnetic storage device with nanocomposite structure and its preparation method. Background technique [0002] Flash memory based on charge storage mechanism, with the reduction of device size, it is difficult to break through the process bottleneck of the 22nm technology node, and cannot meet the rapid development of the information field. A new type of non-volatile memory device - resistive random access memory (RRAM) came into being. The information reading and writing of resistive memory devices is realized by reading or changing the resistance of resistive materials. Its functional layer has high resistance state and low resistance state, corresponding to two states of "0" and "1". Under the condition of external voltage, the resistive memory device can realize reversible switching between high and low resistanc...

Claims

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Application Information

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IPC IPC(8): G11C11/15H01L27/115
CPCG11C11/15H10B53/00
Inventor 李爱东王来国吴迪
Owner NANJING UNIV
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