Thin film transistor and manufacturing method and display panel

Abstract

A thin film transistor comprises: a substrate and an active layer made of a metal oxide disposed on said substrate, said active layer being adjacent to a gate stack;the active layer is partially covered with an electrode, and an insulating layer is further included between the electrode and the active layer; wherein the active layer forms a source region and a drain region in a region covered by the electrode, and a region under which the electrode is not covered forms a channel region. The present invention also relates to a thin film transistor manufacturing method and a display panel having the above-described thin film transistor. The thin film transistor described above has both a small size of a conventional back channel etched structure transistor and a superior performance over conventional etching barrier structure transistors, including low source and drain parasitic resistance, better on-state and off-state performance, Enhanced reliability. The display panel with the above-described thin film transistor has the advantages of high performance, high reliability and low cost, and more in line with the development trend of the display panel.

Description

technical field [0001] The invention relates to a metal oxide thin film transistor structure and a manufacturing method thereof, in particular to a thin film transistor structure used in a display panel. Background technique [0002] Conventional metal oxide thin film transistors use metal deposited on the active layer as electrodes. A Schottky barrier is usually formed at the contact interface between the electrode and the active layer, making the resistance of the contact interface very high, thereby increasing the parasitic contact resistance of the thin film transistor, while the intrinsic metal oxide semiconductor is usually High-resistivity, which brings about the problem of high-resistivity source-drain resistance. The existing solution is to reduce the resistivity of the source region and the drain region by doping the source region and the drain region, but this is usually at the cost of sacrificing process stability and increasing manufacturing cost. For example,...

AI Technical Summary

Problems solved by technology

In thin film transistors with traditional back channel etching structure, the exposed upper interface of the channel will be damaged when the electrode is etched, which will affect the performance of the device

Although such damage can be avoided by adding an etch barrier layer on the channel region, this will not only add an additional photolithography process, thereby increasing the manufacturing cost, but more importantly, the device structure of the etch barrier layer needs to extend the trench. The length of the track and the length of the gate electrode will expand the area of ​​the thin film transistor, which will greatly limit the further improvement of the resolution of the display, which deviates from the high-resolution development trend of the display.

In summary, the device structure of back channel etching has the advantages of simple process, lower manufacturing cost and smaller device size, while the device structure of etching barrier layer provides better device performance and Improved device stability, but expands device area and increases manufacturing cost

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