Chip port frequency test method

A test method and frequency technology, which is applied in the field of chip port frequency test, can solve the problems of high-efficiency mass production test, inconvenient hardware connection of external oscilloscope test, and prolonged test time.

Active Publication Date: 2019-10-25
SINO IC TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Existing technology 2: Do not use ATE to directly test the chip output port frequency. While running the test vector, use the ATE external oscilloscope to perform the output port frequency test; the communication between ATE and the external oscilloscope will lengthen the test time, and the external oscilloscope test is in the hardware It is not convenient to connect
[0009] To sum up, with the rapid development of integrated circuits, the frequency of its ports is getting higher and higher, and the use of existing technologies may increase the cost of testing or make it impossible to perform mass production testing efficiently.

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Embodiment Construction

[0026] When testing the output frequency of the chip port, it is usually necessary to run the test vector first, so that the chip enters the working state required for the test. At this time, the port under test has a frequency output. Grab the signal for analysis, and obtain the output within a period of time t. The number of rising edges of the signal is n, and the output frequency of the measured port is calculated as f=n / t.

[0027] When the frequency of the test vector exceeds the highest frequency fc that the automatic test equipment (ATE) can provide in the frequency test mode, ATE does not support directly testing the port output frequency in the same test item. Such as the existing automatic test device itself supports the highest frequency of the test vector is fo = 400MHz, but only supports the highest frequency of the test vector is fc = 200MHz in the frequency test mode, now it is necessary to test the port output frequency with an expected value of 350MHz, using t...

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Abstract

The invention provides a chip port frequency test method. The method comprises the steps that the frequency of the test vector of an output pin of a chip is defined, and the frequency matches the test frequency of an automatic test device (ATE); other test vectors are operated; and the test vector of the output pin is operated to carry out the chip port frequency test. According to the invention, when the test vector frequency exceeds the available maximum frequency of used ATE in a frequency test mode, the test vectors are divided to test the chip port output frequency through concurrent test technologies; the problems of hardware upgrade and additional cost of the existing first scheme are solved; the problem that other external test devices are needed in the existing second scheme is solved, and the problems of long test time and inconvenient hardware connection are solved; under the condition of unchanged ATE hardware, concurrent test technologies are used to test the higher frequency of a chip port; and the test convenience and the test efficiency of higher output frequency of the chip port are improved.

Description

technical field [0001] The invention relates to the field of chip testing, in particular to a chip port frequency testing method. Background technique [0002] In chip testing, port frequency testing is a very important part. When performing a port frequency test, the automatic test device (ATE) applies an input signal to the input port of the chip to allow the circuit to enter a corresponding working state, and then captures the response signal on the output port under test, and the ATE samples the output signal, and the calculation program Within a limited period of time t, the number of rising edges of the output signal is n, and the output frequency of the tested port is obtained as f=n / t, and f is compared with the expected output frequency value of the port, and if they are consistent, the output frequency of the port of the chip is judged Correct, if not consistent, it is judged that the output frequency of the port of the chip is abnormal. [0003] When testing the...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R23/02G01R31/28
CPCG01R23/02G01R31/2834
Inventor 余琨刘远华汤雪飞王华牛勇
Owner SINO IC TECH
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