Formation method of nanowire field effect transistor

Abstract

The invention provides a formation method of a nanowire field effect transistor. The formation method comprises the steps that a substrate is provided, a stack structure formed by germanium layers and germanium tin layers through alternate stacking is formed on the substrate, and the stack structure comprises a nanowire region and a source electrode region and a drain electrode region which are respectively arranged at the two sides of the nanowire region; a patterned mask layer is formed on the stack structure, and a part of surface of the nanowire region of the stack structure is exposed out of the patterned mask layer; the dry etching process is performed, and a part of the top germanium tin layer of the nanowire region is removed through etching so that top nanowires are formed; the microwave etching process is performed, a layer of the germanium layer of the bottom part of the top nanowires is removed through etching so that a groove is formed and the top nanowires are enabled to be suspended; and the anisotropic first etching process and the anisotropic second etching process are cyclically performed, and the lower germanium tin layers and the germanium layers are etched in turn so that the corresponding lower nanowires are formed and the grooves enabling the corresponding lower nanowires to be suspended are formed. According to the method, all layers of the nanowires are maintained to be consistent in size.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming a nanowire field effect transistor. Background technique [0002] Integrated circuits have evolved from integrating dozens of devices on a single chip to integrating millions of devices. The performance and complexity of traditional integrated circuits have far exceeded the original imagination. To achieve increases in complexity and circuit density (the number of devices that can fit on a given chip area), the feature size of a device, also called "geometry," has grown with each generation of integrated circuits Getting smaller and smaller. Increasing integrated circuit density not only increases the complexity and performance of integrated circuits, but also reduces costs for consumers. Based on the demand for high density, high speed, and low power consumption of integrated circuit chips, integrated circuits are increasingly developing in the ...

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Problems solved by technology

[0006] The performance of nanowire field effect transistors formed by existing technologies still needs to be improved

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