Method for improving stress on IGBT (insulated gate bipolar translator) back surface

A technology of stress and stress distribution, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., and can solve problems such as easy cracking of silicon wafers

Inactive Publication Date: 2016-10-12
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
View PDF2 Cites 4 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a method for improving the stress of the IGBT, and to solve the problem that silicon wafers are easily cracked in the scribing area

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for improving stress on IGBT (insulated gate bipolar translator) back surface
  • Method for improving stress on IGBT (insulated gate bipolar translator) back surface
  • Method for improving stress on IGBT (insulated gate bipolar translator) back surface

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0016] The method for improving the IGBT stress of the present invention, for the polyimide covered on the passivation layer on the front side of the silicon chip, when the scribe groove is defined by photolithography, the exposure of the scribe groove on the polyimide is determined by Light is changed to dark, and after exposure, the polyimide in the scribe groove area remains. The polyimide retained in the scribe groove area can disperse the stress of the silicon chip and improve the stress distribution of the silicon chip.

[0017] Another way is, for the polyimide covered on the passivation layer on the front side of the silicon wafer, when the scribe groove is defined by photolithography, the exposure of the scribe groove on the polyimide is still kept bright, appropriate Add some virtual graphics, which are defined as dark during exposure, and these virtual graphics can be transferred to the polyimide layer. After exposure, the polyimide layer can be evenly distributed o...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a method for improving stress on an IGBT (insulated gate bipolar translator) back surface. With regard to polyimide which covers a passivation layer on the front surface of a silicon wafer, the exposure of a scribing groove on the polyimide is changed from a bright state into a dark state in the photoetching definition for the scribing groove; after exposure is performed, the polyimide in the scribing groove is kept, so that the stress on the silicon wafer can be scattered, and the stress distribution on the silicon wafer can be improved; or, with regard to the polyimide which covers the passivation layer on the front surface of the silicon wafer, the exposure of the scribing groove on the polyimide is still kept at the bright state in the photoetching definition for the scribing groove so as to increase a dark virtual pattern; and after exposure is performed, the dark virtual pattern is transferred to the polyimide, so that uniform distribution can be formed on the polyimide layer.

Description

technical field [0001] The invention relates to the field of design and manufacture of integrated circuits, in particular to a method for improving the back stress of an IGBT. Background technique [0002] IGBT (Insulated Gate Bipolar Transistor) Insulated Gate Bipolar Transistor is a composite fully-controlled voltage-driven power semiconductor device composed of BJT (Bipolar Transistor) and MOS (Insulated Gate Field Effect Transistor). The advantages of high input impedance and low conduction voltage drop of GTR. It is very suitable for the conversion system with a DC voltage of 600V and above, such as AC motors, frequency converters, switching power supplies, lighting circuits, traction drives and other fields. [0003] Common IGBT structures such as figure 1 As shown, the front side of substrate 1, namely figure 1 The upper part is the gate 2 on the front of the IGBT, the gate oxide layer 3, the P well 4, the front metal connection 7 and so on. the back, ie figure 1...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/331
CPCH01L29/66325
Inventor 马彪
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products