Reinforcement configuration memory array applicable to FPGA for space navigation and configuration method of reinforcement configuration memory array

Abstract

The invention relates to a reinforcement configuration memory array applicable to an FPGA (Field Programmable Gate Array) for space navigation and a configuration method of the reinforcement configuration memory array, wherein the configuration memory array uses DICEs (Double Interlocked Storage Cells) for realizing single particle reinforcement of the configuration memory array; and the influence of single particles on the configuration memory array is reduced. The configuration method is characterized in that before the configuration memory array is electrified, all configuration memory units are in a 0-write state through a column address decoding circuit and a frame data register; and during electrification, all initial states of all DICEs after the electrification are 0 due to the inductive effect of external work conditions. The logic conflict of an FPGA interconnection matrix after the electrification due to the non-determined state of the configuration memory units is avoided, so that the problem of electrification surge current of the FPGA is effectively solved; the design difficulty of a system using the FPGA is reduced; and the work reliability of the FPGA for space navigation is improved.

Description

technical field [0001] The invention relates to a reinforced configuration memory array and a configuration method suitable for FPGA used in aerospace, and belongs to the technical field of integrated circuits. Background technique [0002] A Field Programmable Logic Gate Array (hereinafter referred to as FPGA) can implement different logic functions according to configuration information. The configuration memory array of traditional aerospace FPGA is as follows: figure 1 As shown, the SRAM unit is used as the storage unit to store the user's configuration information (SRAM-type FPGA for short), and the configuration frame composed of the SRAM unit can be programmed repeatedly indefinitely, so that the application of FPGA has great flexibility, especially suitable for aerospace engineering The characteristic requirements of high reliability, variety and small batch of aerospace devices are widely used in aerospace engineering. [0003] Single event effects such as single ...

AI Technical Summary

Problems solved by technology

When SRAM FPGA is applied in the space environment, the space high-energy single particle passing through the interior of the SRAM unit will cause an instantaneous current on the circuit node, causing the storage unit to undergo a single event flip, so that the configuration memory array cannot work normally, affecting the system function using the FPGA realization of

[0004] At the same time, the initial logic state of the SRAM unit is randomly "0" or "1" after power-on, which leads to internal logic confusion after the FPGA device is powered on and before the configuration data is loaded. Internal logic conflicts cause the FPGA to consume a large amount of current. current is referred to as the power-on surge current

The existence of power-on surge current greatly affects the use of FPGA: on the one hand, it increases the design difficulty of the system using FPGA, on the other hand, it reduces the reliability of the system in harsh space environments

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