A kind of inverter, gate drive circuit and display device

A technology of inverters and gates, which is applied in the display field, can solve the problems of inverter current leakage, failure to obtain power supply signals, and difficult application of inverters, etc., and achieve the effect of increasing the maximum output current

Active Publication Date: 2017-09-22
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, in the prior art, on the one hand, because the pull-up transistor of the inverter in the gate drive circuit is in a normally-on state, the inverter has a phenomenon of current leakage; on the other hand, due to the pull-up transistor of the inverter The gate-source voltage difference of the pulling transistor is small, so the maximum output current of the power signal output by the inverter is small, and it is impossible to obtain a power signal whose maximum output current meets a certain threshold. For the OLED pixel structure designed by Scan Power , it needs to provide a relatively large light-emitting current when outputting a high level, and it is difficult to realize the application of Scan Power technology in display devices with known inverters

Method used

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  • A kind of inverter, gate drive circuit and display device
  • A kind of inverter, gate drive circuit and display device
  • A kind of inverter, gate drive circuit and display device

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Experimental program
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Effect test

Embodiment 1

[0020] see figure 1 , the inverter provided by the embodiment of the present invention includes a current amplifying module P1 and a pull-down module P2; wherein, the current amplifying module P1 is connected to the first clock signal terminal CLK1, the second clock signal terminal CLK2, the third clock signal terminal CLK3, the fourth The clock signal terminal CLK4, the first input signal terminal Input1, the second input signal terminal Input 2, the high-level terminal VGH, the low-level terminal VGL, the pull-down module P2 and the output terminal OUT of the inverter, and the current amplification module P1 is used according to the first The signal of the first clock signal terminal CLK1, the signal of the second clock signal terminal CLK2, the signal of the third clock signal terminal CLK3, the signal of the fourth clock signal terminal CLK4, the signal of the first input signal terminal Input 1 and the second input signal terminal The signal of Input 2 amplifies the curre...

Embodiment 2

[0024] see figure 2 The current amplifying module P1 in the first embodiment may include a first current amplifying sub-module P11, a second current amplifying sub-module P12, a third current amplifying sub-module P13, and a fourth current amplifying sub-module P14. Among them, the first current amplification sub-module P11 is connected to the first clock signal terminal CLK1, the second clock signal terminal CLK2, the first input signal terminal Input1, the second input signal terminal Input 2, the high level terminal VGH, the low level terminal VGL, the first The second current amplifying sub-module P12, the third current amplifying sub-module P13, the fourth current amplifying sub-module, the pull-down module P2 and the output terminal OUT of the inverter, and the first current amplifying sub-module P11 is used for the first clock signal terminal CLK1 The signal of the second clock signal terminal CLK2, the signal of the first input signal terminal Input 1 and the signal o...

Embodiment 3

[0028] see image 3 , the first current amplifying sub-module P11, the second current amplifying sub-module P12, the third current amplifying sub-module P13, the fourth current amplifying sub-module P14 and the pull-down module P2 in the second embodiment will be described in detail below The specific composition structure, and the connection relationship between the specific composition structure of the first current amplification sub-module P11, the second current amplification sub-module P12, the third current amplification sub-module P13, the fourth current amplification sub-module P14 and the pull-down module P2 .

[0029] The first current amplifying sub-module P11 includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5 and a first capacitor C1; wherein, the gate of the first transistor T1 is connected to the second The input signal terminal Input 2, the second current amplifying sub-module P12, the th...

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Abstract

The invention discloses an inverter, a gate drive circuit and a display device, and relates to the field of display technology. In order to solve the problem that the current of the power signal output by the inverter is small, it is difficult to realize the application of Scan Power technology in the display device . The inverter includes: used for according to the signal of the first clock signal terminal, the signal of the second clock signal terminal, the signal of the third clock signal terminal, the signal of the fourth clock signal terminal, the signal of the first input signal terminal and the signal of the second input signal terminal signal, amplifying the current at the output terminal of the inverter, and controlling the output terminal of the inverter to output a current amplification module of a high-level signal, and a pull-down module used to control the output terminal of the inverter to output a low-level signal. The inverter provided by the invention is applied to a display device adopting Scan Power technology.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an inverter, a gate drive circuit and a display device. Background technique [0002] In the display device, the pixel array includes gate scan lines, data lines and multiple pixel units surrounded by the gate scan lines and data lines. Wherein, in order to realize the progressive scanning of the pixel units in the pixel array, a gate driving circuit is generally used to drive the pixel units in the pixel array. At present, in order to simplify the pixel structure and improve the pixel aperture ratio and product yield, the OLED (Organic Light Emitting Diode) pixel structure designed by Scan Power technology (scanning AC power technology) is often used. [0003] However, in the prior art, on the one hand, because the pull-up transistor of the inverter in the gate drive circuit is in a normally-on state, the inverter has a phenomenon of current leakage; on the other hand,...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G09G3/3208
CPCG09G3/3266G09G2310/0286G11C19/287
Inventor 李全虎
Owner BOE TECH GRP CO LTD
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