Multi-core processor system and cache coherency processing method
A technology of a multi-core processor and a processing method, applied in the computer field, can solve the problems of poor performance of multi-core processor system and high possibility of memory, etc.
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[0062] In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.
[0063] The steps shown in the flowcharts of the figures may be performed in a computer system, such as a set of computer-executable instructions. Also, although a logical order is shown in the flowcharts, in some cases the steps shown or described may be performed in an order different from that shown or described herein.
[0064] The cache lines in the multi-core processor system provided by the following embodiments of the present invention all have an M state, an exclusive (Exclusive, abbreviated as: E) state, a keeping (Keeping, abbreviated as: K) state, and an invalid (I...
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