Method for forming fin type field effect transistor

Abstract

A method for forming a fin type field effect transistor comprises the steps of providing a semiconductor substrate which comprises a first region and a second region, wherein a first fin part is formed on the first region and a second fin part is formed on the second region, and an insulating layer is formed on the semiconductor substrate; forming a barrier layer on the second fin part; forming a first pseudo gate structure on the first region; forming a second pseudo gate structure on the second region, wherein the second pseudo gate structure is arranged on the surface of the barrier layer and bestrides the second fin part; forming a dielectric layer which is level with the first pseudo gate structure and the second pseudo gate structure on the semiconductor substrate; eliminating the first pseudo gate structure for forming a first groove which is exposed from the surface of the first fin part, and eliminating the second pseudo gate structure for forming a second groove which is exposed from the barrier layer on the second fin part; and forming a first gate structure in the first groove, and forming a second gate structure in the second groove. The method of the invention can be used for accurately adjusting the gate dielectric layer thickness of the fin type field effect transistor which is formed on different regions.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a fin field effect transistor. Background technique [0002] With the continuous development of semiconductor process technology, the process node is gradually reduced, the traditional gate dielectric layer is getting thinner, and the leakage of transistors is increasing, which causes problems such as waste of power consumption of semiconductor devices. In order to solve the above problems, the prior art provides a solution of replacing the polysilicon gate with a metal gate. Among them, the "gate last" process is a main process for forming high-K metal gate transistors. However, when the feature size of the device is further reduced, even if the gate-last process is adopted, the structure of the conventional MOS field effect transistor can no longer meet the requirements for device performance. Fin field effect transistor (Fin FET) is obtained as a m...

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Problems solved by technology

[0004] In the prior art, the fin field effect transistors in the core area and the peripheral area are generally formed at the same time, but in the process of forming the fin field effect transistors in the core area and the peripheral area at the same time, it is difficult to accurately control the fin field effect transistors in the peripheral area The thickness of the gate dielectric layer of the effect transistor causes the electrical parameters of the fin field effect transistor in the peripheral region to fail to meet the requirements

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