Novel low-stepping low-phase noise frequency synthetic system

Abstract

The invention belongs to the frequency synthesis technical field and provides a novel low-stepping low-phase noise frequency synthetic system. The novel low-stepping low-phase noise frequency synthetic system includes a reference frequency phase-locked loop module, a DDS frequency stepping synthesis module and a radio frequency output phase-locked loop module. The novel low-stepping low-phase noise frequency synthetic system is a kind of advanced composite-system frequency synthesis technology. According to the novel low-stepping low-phase noise frequency synthetic system, the phase-locked frequency synthesis technology and the direct digital frequency synthesis technology are combined together, and therefore, advantages can be displayed, and disadvantages can be hidden; the low-stray and high-speed frequency switching frequency synthesis system embodies extremely low-frequency stepping and low-phase noise functions on the whole; under a high-frequency output condition, extremely low phase noises and extremely low frequency stepping can be realized with a certain stray level control index ensured; the design technical scheme of the system is simple and reasonable, and the engineering production of the system can be realized with easiness.

Description

technical field [0001] The invention belongs to frequency synthesis technology, in particular to a novel frequency synthesis system with small step and low phase noise. Background technique [0002] The existing mainstream small-step frequency synthesis technology generally uses the direct digital frequency synthesis system (DDS) to meet the requirements of small frequency steps, but in the actual application environment, if the DDS chip is used to directly output a higher frequency, in order to ensure the frequency Quality, it is necessary to provide a low-noise, high-quality, high-frequency reference clock for DDS. Affected by such harsh conditions, it is generally rare to use a single DDS chip to design a frequency source in the case of high-frequency output. [0003] In the traditional design, to achieve higher frequency output, the common method of frequency source is phase-locked loop (PLL) frequency multiplication frequency synthesis method, but if the resolution of P...

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Problems solved by technology

[0002] The existing mainstream small-step frequency synthesis technology generally uses the direct digital frequency synthesis system (DDS) to meet the requirements of small frequency steps, but in the actual application environment, if the DDS chip is used to directly output a higher frequency, in order to ensure the frequency Quality, it is necessary to provide a low-noise, high-quality, high-frequency reference clock for DDS. Affected by such harsh conditions, it is generally rare to use a single DDS chip to design a frequency source in the case of high-frequency output.

[0003] In the traditional design, to achieve higher frequency output, the common method of frequency source is phase-locked loop (PLL) frequency multiplication frequency synthesis method, but if the resolution of PLL circuit is to be improved and the requirement of small step output is realized, it is necessary to improve The frequency division coefficient of the phase-locked loop will reduce the phase comparison frequency accordingly, and the response speed of the phase-locked loop will also slow down. In addition, the gain of the loop will decrease with the increase of the resolution, which will deteriorate the purity of the output waveform and it is difficult to guarantee The output frequency is low in phase noise; therefore, although a single use of PLL technology ensures a high output frequency of the frequency source, it is difficult to achieve a high-quality small-step frequency source

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