Low-dropout linear voltage regulator

A low dropout linear, voltage regulator technology, applied in the field of electronics, can solve problems such as long settling time

Active Publication Date: 2015-09-09
HEFEI GEYI INTEGRATED CIRCUIT CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The present invention provides a low-dropout linear voltage regulator to solve the problem that the entire loop of the low-dropout linear voltage regulator has relatively long settling time

Method used

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Embodiment 1

[0025] Embodiment 1 of the present invention provides a low dropout linear regulator.

[0026] refer to figure 2 , shows a schematic structural diagram of a low dropout linear regulator in Embodiment 1 of the present invention.

[0027] The low dropout linear regulator may include: a first P-type field effect transistor P1, a second P-type field effect transistor P2, a third P-type field effect transistor P3, a first N-type field effect transistor N1, a first resistor R1, the low dropout linear voltage regulator enable signal LDO_EN, the first P-type field effect transistor enable signal ACC_ENB, and the first N-type field effect transistor enable signal ACC_EN.

[0028] Wherein, the LDO_EN enable signal LDO_EN is connected to the enable terminal EN of the flash memory comparator COMP, and the input voltage Vref and the output voltage Vout are respectively connected to the input terminal + and the output terminal − of the flash memory comparator.

[0029] The gate terminal ...

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PUM

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Abstract

The invention provides a low-dropout linear voltage regulator, which comprises a first P-type field effect transistor, a second P-type field effect transistor, a third P-type field effect transistor, a first N-type field effect transistor, a first resistance, low-dropout linear voltage regulator enable signals, first P-type field effect transistor enable signals and first N-type field effect transistor enable signals. The low-dropout linear voltage regulator increases field effect transistors as switch pipes in a traditional low-dropout linear voltage regulator, generates enable signals of two switch pipes by utilizing the low-dropout linear voltage regulator enable signals, and gate ends of the P-type field effect transistors are pulled to a suitable low voltage when the low-dropout linear voltage regulator enable signals are pulled up, thereby speeding up setup procedure of a whole loop, and reducing voltage setup time of the low-dropout linear voltage regulator.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to a low-dropout linear regulator. Background technique [0002] Traditional low dropout linear regulators such as figure 1 , including: input voltage Vref, output voltage Vout, power supply VCC, P-type field effect transistor P3, resistor R, low-dropout linear regulator enable signal LDO_EN, because the low-dropout linear regulator is applied to the comparator COMP of the flash memory, In order to save power consumption, the current of the comparator is generally relatively small and the bandwidth is relatively low, so the establishment time of the entire loop of the low dropout linear regulator is relatively long, which easily reduces the working efficiency of the flash memory. Contents of the invention [0003] The invention provides a low-dropout linear voltage stabilizer to solve the problem that the whole loop of the low-dropout linear voltage stabilizer has relatively ...

Claims

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Application Information

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IPC IPC(8): G05F1/565
Inventor 方海彬邓龙利刘铭
Owner HEFEI GEYI INTEGRATED CIRCUIT CO LTD
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