FPGA (Field Programmable Gate Array)-based general matrix fixed-point multiplier and calculation method thereof

Abstract

The invention discloses an FPGA (Field Programmable Gate Array)-based general matrix fixed-point multiplier. An internal structure of the multiplier consists of a control module, a conversion module, an operation module and a storage module. The control module is used for generating a control signal according to dimension of a to-be-operated matrix. The conversion module is responsible for performing conversion between a fixed-point number and a floating-point number during operation. The operation module is used for reading operation data from the storage module and the conversion module, performing fixed-point multiplication and fixed-point accumulating operation and storing a result in the storage module. The storage module is used for caching to-be-operated matrix data and result matrix data, providing an interface compatible with a bus signal and allowing access of other components on a bus. The characteristic of high fixed-point calculation efficiency in hardware is fully utilized; by using a unique operation structure, simultaneous conversion and operation of the data are realized to improve the overall operation speed, and a plurality of matrix fixed-point multipliers can be simultaneously used to perform parallel calculation; thus the fixed-point multiplication of an arbitrary dimension matrix can be supported, and meanwhile extremely high calculation efficiency is guaranteed. Compared with matrix multiplication performed by using the floating-point number, the multiplier has the advantage that the calculation efficiency is greatly improved.

Description

technical field [0001] The invention belongs to the field of high-performance computing, and is a design for improving the computing capability of FPGA matrix. Background technique [0002] Matrix multiplication operation is a basic operation in scientific computing, widely exists in the fields of industrial control, pattern recognition, digital signal processing, etc., especially in portable devices, often involves pattern recognition, image processing and other operations, these operations are useful A large number of matrix operations are completed, and portable devices usually have low computing configurations, and matrix multiplication has become the most time-consuming key operation in the computing process. The time complexity of matrix multiplication is high, usually O(N 3 ), its computing performance directly affects the overall performance of the system. [0003] The rapid development of FPGA technology in recent years has created opportunities for high-speed rea...

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Problems solved by technology

[0006] By consulting relevant literature, most of the matrix multiplications currently implemented by FPGA are directly calculated using floating point numbers. Matrix multiplier, but in the calculation process, the time consumed by floating-point calculator operations is much longer than that of fixed-point calculations

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