Semiconductor device and preparation method thereof

Abstract

The invention provides a semiconductor device and a preparation method thereof, relating to the technical field of semiconductors. The preparation method of the semiconductor device has the beneficial effect that regulation of threshold voltages of transistors is achieved by adding cap layers and barrier layers in a gate laminated structure, so that the semiconductor device with multiple threshold voltages can be better achieved. Regulation of the threshold voltages of the transistors can be achieved as the cap layers and the barrier layers are added in the gate laminated structure, so that the semiconductor device has better threshold voltage characteristics.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the field of semiconductor technology, how to reduce power consumption while ensuring the performance of semiconductor devices has become a major challenge faced by people. Power consumption / performance optimization (Power-performance optimization) usually requires semiconductor devices to have multiple threshold voltages (Vt) and low off-current (Ioff). In planar bulk silicon semiconductor devices, multiple threshold voltages are achieved by using two work function layers (corresponding to NFET and PFET respectively) and using different gate lengths and doping concentrations. Fin Field Effect Transistor (FinFET) has excellent electrostatic control ability due to its small device size and small operating voltage. However, the reduction of device size and operating voltage, especial...

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Problems solved by technology

Fin Field Effect Transistor (FinFET) has excellent electrostatic control ability due to its small device size and small operating voltage. However, the reduction of device size and operating voltage, especially the reduction of operating voltage, leads to the threshold Control of voltage variability becomes very difficult

In semiconductor devices with large-scale application of Fin Field Effect Transistors (FinFETs), as the process node continues to decrease, the number of ions that need to be implanted continues to decrease (for example, the number of ions that need to be implanted for devices using a 10nm process node is very small), The ion implantation process becomes very difficult to control

[0003] Different metal capping process (capping) can effectively adjust the threshold voltage of FinFET, but this method requires complex integration process and does not bring other improvements

However, the traditional ion implantation process will reduce the ion mobility of the device and may cause random fluctuations of dopants that have a very bad impact on the device.

Also, for the manufacturing method of semiconductor devices using metal gate technology, the ion implantation process also faces the challenge of controlling the ion implantation dose to prevent ions from penetrating into the high-k dielectric layer or the channel region of the device

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