Storage unit of single polycrystalline nonvolatile storage

A non-volatile memory and storage unit technology, applied in the field of integrated circuits, can solve the problems of inability to improve storage density, high manufacturing cost, large area of ​​single-poly non-volatile storage unit, etc., so as to reduce the technical development cycle and engineering production. effect of cost

Active Publication Date: 2014-10-22
NAT UNIV OF DEFENSE TECH +1
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

Single polycrystalline non-volatile memory cells use the ratio of tunneling tube capacitance to control tube capacitance to couple high voltage to the floating gate. The area of ​​the control tube

Method used

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  • Storage unit of single polycrystalline nonvolatile storage
  • Storage unit of single polycrystalline nonvolatile storage
  • Storage unit of single polycrystalline nonvolatile storage

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Embodiment Construction

[0028] refer to figure 1 , the storage unit of the single polycrystalline nonvolatile memory includes: a control transistor 110 , a tunneling transistor 120 , a selection transistor 130 and a floating gate 140 . The control transistor 110 is a PMOS transistor whose area is five times that of the tunneling transistor 120 . The source 111 of the control transistor 110 is defined as port C. The control transistor 110 resides in the first N-well 210 . The gate of the control transistor 110 is a single poly crystal connected with the floating gate 140 . The selection transistor 130 is a PMOS transistor connected in series with the control transistor, and its source 131 is connected to the drain 113 of the control transistor 110 . The select transistor 130 resides in the first N-well 210 . The gate 134 of the selection transistor 130 is defined as a port SEN, and the drain 133 is defined as a port R. The first N well 210 is connected to the source 111 of the control transistor 11...

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Abstract

The invention discloses a storage unit of a single polycrystalline nonvolatile storage. The storage unit comprises a control tube, a tunneling tube, a selecting tube and a floating gate, wherein the control tube is a PMOS (P-channel Metal Oxide Semiconductor) tube with a relatively large area and is used for coupling voltage on the control tube to the floating gate, an N well of the control tube is connected with a source electrode of the control tube, and a grid electrode of the control tube is connected with the floating gate; the tunneling tube is a PMOS tube which is not provided with a drain region or a source region, a polycrystalline part of a grid electrode of the tunneling tube covers an oxidation isolation tank, an N well of the tunneling tube is connected with a source electrode of the tunneling tube, and the grid electrode of the tunneling tube is connected with the floating gate; the selecting tube is a PMOS tube which is connected with the control tube in series, a source electrode of the selecting tube is connected with a drain electrode of the control tube, an N well of the selecting tube is connected with the N well and the source electrode of the control tube, and a grid electrode of the selecting tube is used for inputting a selection signal. The storage unit of the single polycrystalline nonvolatile storage is completely compatible with a standard CMOS (Complementary Metal Oxide Semiconductor) process and can be embedded into a standard CMOS integrated circuit, so as to greatly shorten the technology development cycle and reduce the engineering production cost.

Description

technical field [0001] The present invention relates to the field of integrated circuits, in particular, to storage units for non-volatile memories. Background technique [0002] With the development of electronic technology, many integrated circuit systems or modules need to use a certain capacity of non-volatile memory. Usually, the non-volatile memory can be used as an independent memory chip, and the data processing is performed by the external control circuit of the chip. In many cases, however, nonvolatile memory must be integrated on the same chip as other control circuits. [0003] In conventional non-volatile memory devices, most memory cells use a floating gate structure to store charges and store data. Especially for standard silicon-substrate complementary metal-oxide-semiconductor (CMOS) process flows, floating-gate memory cells typically require an additional polysilicon layer. Therefore, the integration of nonvolatile memory cells in standard CMOS processes...

Claims

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Application Information

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IPC IPC(8): G11C16/10G11C16/14
Inventor 尚靖李建成李聪李文晓王震王宏义谷晓忱郑黎明李浩
Owner NAT UNIV OF DEFENSE TECH
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