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FPGA (Field Programmable Gate Array) based power failure protection system and method

A technology of power-down protection and power-down detection module, which is applied in the direction of response error generation, redundant data error detection in operation, etc., which can solve the problems of high cost of power management chips, complex charging and discharging circuits, and poor reliability. , to achieve the effect of fast and timely backup and protection, easy implementation and low cost

Active Publication Date: 2014-08-13
WUHAN POST & TELECOMM RES INST CO LTD
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  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the battery battery will occupy a large area in the PCB layout. Even if the requirements for the volume of the equipment are not very high, there are disadvantages such as short life, poor reliability, and high cost. Moreover, most of the charging and discharging circuits are more complicated, and the power management chip is added. And the cost is higher

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  • FPGA (Field Programmable Gate Array) based power failure protection system and method
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  • FPGA (Field Programmable Gate Array) based power failure protection system and method

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Embodiment Construction

[0037] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0038] Such as Figure 1~Figure 3 As shown, the present invention relates to a power-down protection system based on FPGA, comprising a power supply module, which supplies power to each part of the system and provides a detection voltage; a power-down detection module, for detecting whether power-down; And forward the power-down detection signal; the CPU minimum system is used to receive the power-down detection signal and send out a reset control signal; the reset control module is used to output a reset signal.

[0039] The input terminal of the power module is connected to the input power supply voltage of the device, that is, the detected voltage, and the output terminal is connected to the energy storage inductor L1 and the energy storage capacitor C1. After passing through the energy storage inductor and capacitor, the output voltage is connected ...

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Abstract

The invention relates to an FPGA (Field Programmable Gate Array) based power failure protection system and an FPGA based power failure protection method. The system comprises a power failure detection module, a power supply module, a CPU (Central Processing Unit) minimum system, an FPGA processing module and a reset control module, wherein the power supply module is used for supplying power to other four parts respectively, the power failure detection module is used for detecting whether to power failure occurs and outputting a monitoring signal; the FPGA processing module is connected with the power failure detection module for detecting the monitoring signal output by the power failure detection module; the CPU minimum system is connected with the FPGA processing module for receiving a power failure warning signal from the FPGA processing module and outputting a reset control signal; the reset control module is connected with the CPU minimum system for resetting. The system overcomes the disadvantages that the used standby battery has large volume, high cost, short life, poor reliability and the like, and utilizes the own resources to provide a method for timely backing up and protecting system data and programs under a condition that the system is powered down suddenly, and the system has the advantages of small volume, low cost, easiness in realization, high reliability and the like.

Description

technical field [0001] The invention relates to the technical field of communication electronics, in particular to an FPGA-based power-down protection system and method. Background technique [0002] With the development of communication and electronic technology, higher and higher requirements are put forward for the reliability of equipment. In various emergencies, equipment can protect the system, and then normal startup and operation become one of the indispensable standards for measuring reliability. one. In the process of sudden power failure of the equipment, because each part of the system is in an uncontrollable level state, program files and data may be destroyed, affecting the normal operation of the system. Therefore, in equipment with high reliability requirements, a power-down protection circuit must be provided. [0003] At present, there are several power-failure protection methods: one can provide backup power for the device to ensure that the backup power...

Claims

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Application Information

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IPC IPC(8): G06F11/14
Inventor 王晓静游为华张明利周世军杨浩
Owner WUHAN POST & TELECOMM RES INST CO LTD
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