Groove MOSFET and manufacturing method thereof

A trench and insulating layer technology, applied in trench MOSFET and its manufacturing field, can solve problems such as electrical performance deterioration of trench MOSFET, and achieve the effects of improving thickness uniformity, reducing influence and increasing breakdown voltage

Active Publication Date: 2014-06-25
HANGZHOU SILICON-MAGIC SEMICON TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] In view of this, the object of the present invention is to provide a trench MOSFET and its manufacturing method to solve the problem ...

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  • Groove MOSFET and manufacturing method thereof
  • Groove MOSFET and manufacturing method thereof
  • Groove MOSFET and manufacturing method thereof

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Embodiment Construction

[0031] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.

[0032] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another layer or another region, or Other layers or regions are also included between it and another layer or another region. And, if the device is turned over, the layer, one region, will be "below" or "beneath" the other layer, another region.

[0033] If it is to describe the situation directly on another layer or an...

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Abstract

The invention provides a groove MOSFET and a manufacturing method thereof. The groove MOSFET comprises an epitaxy semiconductor layer located on a semiconductor substrate, a groove extending into the epitaxy semiconductor layer from the upper portion of the epitaxy semiconductor layer, a shielding conductor, a middle insulating layer located above the shielding conductor, a grid electrode dielectric medium located on the side wall of the upper portion of the groove, a grid electrode conductor located at the upper portion of the groove and isolated from the shielding conductor by the middle insulating layer, a well region located in the epitaxy semiconductor layer and adjacent to the groove, a source region located in the well region and adjacent to the groove, a source electrode contact, a drain electrode contact, a grid electrode contact and a shielding contact, wherein at least one part of the shielding conductor is located at the lower portion of the groove, and the source electrode contact, the drain electrode contact, the grid electrode contact and the shielding contact are respectively and electrically connected with the source region, the semiconductor substrate, the grid electrode conductor and the shielding conductor. The shielding conductor and the epitaxy semiconductor layer are isolated by an insulating overlapped layer, and the insulating overlapped layer comprises at least one oxide layer and at least one nitride layer. The groove MOSFET can improve the quality of the middle insulating layer and accordingly increase the puncture voltage.

Description

technical field [0001] This invention relates to semiconductor technology, and more particularly, to trench MOSFETs and methods of manufacturing the same. Background technique [0002] Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) have been widely used as power semiconductor devices, for example as switches in power converters. [0003] A MOSFET may have a planar structure in which a source region and a drain region are formed on one side of a semiconductor substrate, and a gate conductor is located above the surface of one side of the semiconductor substrate, separated from the semiconductor substrate by a gate dielectric. MOSFETs can also have a vertical structure in which a source region is formed on one side of the semiconductor substrate, a drain region is formed on the other side, and a gate conductor extends into the interior of the semiconductor substrate, separated from the semiconductor substrate by a gate dielectric. [0004] On the basis of the ve...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0611H01L29/0649H01L29/66666H01L29/7828H01L29/7813H01L29/407H01L29/42376H01L29/41766H01L29/66734
Inventor 童亮
Owner HANGZHOU SILICON-MAGIC SEMICON TECH CO LTD
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