Technology for producing 12-inch monocrystalline silicon epitaxial wafers through pressure reduction

Abstract

The invention provides a technology for producing 12-inch monocrystalline silicon epitaxial wafers through pressure reduction. The technology comprises the following steps: (1) cleaning a reaction cavity with high-purity HCl gas at 1150-1190 DEG C; (2) introducing high-purity H2 to purge the HCl gas and reaction products remaining in the reaction cavity; (3) lowering the temperature inside the reaction cavity to 700-900 DEG C, loading 12-inch monocrystalline silicon wafers onto a slide glass base; (4) reducing the pressure intensity inside the reaction cavity to 20-200 Torr, then heating to 1000-1050 DEG C, wherein the flow rate of the carrier gas high-purity H2 is 40-160 SLM; (5) pre-flowing reaction gas, and adjusting the process and the time that DCS and doping agent are introduced into the reaction cavity to grow an epitaxial layer; (6) cooling to 900 DEG C, and taking out the epitaxial wafers. Through the technology provided by the invention, the epitaxial wafers which have the advantages that electrical resistivity of the epitaxial layer is uniform and the epitaxial layer and substrate electrical resistivity transition areas are narrow can be prepared.

Description

technical field [0001] The invention relates to a process for producing 12-inch monocrystalline silicon epitaxial wafers under reduced pressure. Background technique [0002] With the development of silicon semiconductor technology, the size of single crystal silicon wafers is required to be larger and larger, and the international market is gradually transitioning from 6 or 8 inch single crystal silicon wafers to 12 inch single crystal silicon wafers. Single crystal silicon wafers produced by the traditional Czochralski process have indispensable native defects, which will reduce the yield and reliability of subsequent devices. As the size of single crystal silicon wafers increases, it becomes more and more difficult to control the native defects of single crystal. [0003] Using the method of vacuum vapor deposition to grow the epitaxial layer has good crystal integrity, can eliminate surface or near-surface defects of silicon polished wafers, and improve the final chip y...

AI Technical Summary

Problems solved by technology

However, usually in the epitaxial process, due to the self-diffusion effect of the silicon wafer or the thermal diffusion effect of impurities inside the epitaxial furnace, the epitaxial layer and the surface resistivity transition zone of the silicon wafer are relatively wide, which affects the performance of the silicon epitaxial wafer in high-frequency devices, etc. field application

Images