Method for directly extracting small-signal model parameters of III-V MOSFET

Abstract

The invention discloses a method for directly extracting small-signal model parameters of an III-V family MOSFET, and belongs to the technical field of micro-electronics integrated circuits. The method includes the steps of conducting de-embedding through a bonding pad and a metal interconnection line, determining, by means of the transistor direct-current transfer characteristic and a cold state S parameter, a bias condition suitable for extracting a transistor parasitic resistor, then, removing the influences of a channel resistor under the bias condition, conducting linear fitting to extract the parameters of the parasitic resistor, finally, conducting de-embedding on the parasitic resistor, and extracting intrinsic parameters through an equivalent circuit of a small-signal model of the III-V family MOSFET and through linear fitting. The process for directly extracting the small-signal parameters completely conforms to the physical significance of a device, a necessary foundation for the application of the integrated circuit technology is provided, and meanwhile the method has a very good reference function for extraction of small-signal model parameters of other types of devices which are made of novel materials and are of novel structures.

Description

technical field [0001] The present invention relates to the technical field of microelectronic integrated circuits, in particular to a method for directly extracting small-signal model parameters of III-V MOSFETs, which can be used to effectively extract small-signal parameter results of III-V MOSFET type devices for use in device technology Optimization and circuit simulation design. Background technique [0002] At the 11nm technology node and beyond, due to the limitations of the physical properties of silicon materials, silicon-based CMOS technology will face enormous challenges, and high-mobility "non-silicon" materials will be gradually introduced into CMOS technology. III-V compound semiconductor materials have the advantages of high electron mobility, short intrinsic delay time, good radio frequency performance, small gate leakage, low static power consumption, etc., and have become a research hotspot in the current international MOSFET technology. Accurate extracti...

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Problems solved by technology

In the literature "A new method for determining the FET small signal equivalent circuit" (IEEE Transaction on Microwave Theory and Techniques, July 1988), Gilles Dambrine et al. described in detail the direct extraction method of GaAs HEMT small signal model parameters, in which the parasitic resistance parameter The extraction is that the device is in a cold state, fully consider the channel resistance under the gate and the equivalent impedance of the Schottky barrier, and use the Z parameter fitting results under 3 different gate current conditions as an additional relationship condition to obtain the parasitic resistance parameter , however, for MOSFET structure devices, due to the insulation of the oxide layer under the gate, such a method is no longer applicable; the intrinsic parameters are calculated by the analytical method to obtain the functional relationship of the intrinsic parameters with respect to frequency, and then the parameters are obtained in the frequency flat region The value obtained in this way will have a certain deviation when fitting in some frequency regions

[0004] In addition, in the literature "AlN-GaN MOS-HEMTs with thermally grown Al2O3 passivation" (IEEE Transaction on Electron Devices, May 2011), Sanna Taking et al. extracted the parasitic parameters of MOS-HEMT structure devices. The source / drain parasitic resistance was tested by TLM and The geometric dimensions of the device are calculated, and the gate parasitic resistance is calculated through the resistivity and size parameters of the gate metal. The disadvantage of this method is that the theoretical contribution of resistance is considered separately in the process of extracting parameters, and the parasitic resistance in the process of device manufacturing process is ignored. Changes that may occur; wherein the overall optimization is performed after extracting the intrinsic parameters to eliminate the randomness of the process, and then the optimized parameter results may deviate from the physical meaning of the device itself

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