Biosensor based on tunneling field effect transistor and preparation method of biosensor
A tunneling field effect and biosensor technology, applied in the field of tunneling field effect transistor-based biosensors and its preparation, can solve problems affecting the performance of biosensors, insensitivity to channel surface charge changes, etc., and achieve steep sub- Sensitivity to changes in threshold slope, channel surface charge, and high-sensitivity detection effects
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Embodiment 1
[0041] The invention provides a method for preparing a biosensor based on a tunneling field effect transistor, the preparation method at least including the following steps:
[0042] Step 1, preparing a tunneling field effect transistor as a converter;
[0043] Step 2, using a surface modifier to activate and modify the surface of the channel in the tunneling field effect transistor.
[0044] The preparation method of the tunneling field-effect transistor-based biosensor provided by the present invention will be described in detail below with reference to specific drawings.
[0045] First, step 1 is performed to prepare a tunneling field effect transistor as a converter.
[0046] The specific process of preparing the tunneling field effect transistor is as follows:
[0047] 1) An SOI substrate is provided, and the SOI substrate includes a top silicon layer, a buried oxide layer and a bottom silicon layer.
[0048] see figure 1 , in the provided SOI substrate 1 , there are ...
Embodiment 2
[0065] The present invention also provides a biosensor based on a tunneling field effect transistor, which is made by using the preparation method provided in Example 1. The biosensor based on a tunneling field effect transistor at least includes:
[0066] The converter is a tunneling field effect transistor;
[0067] The surface modifier covers the surface of the channel in the tunneling field effect.
[0068] Preferably, the tunneling field effect transistor includes at least:
[0069] SOI substrate 1, including top layer silicon 11, buried oxide layer 12 and bottom layer silicon 13;
[0070] The source 3 and the drain 2 are formed on both sides of the top layer silicon 11;
[0071] a channel 4 located between the source 3 and the drain 2;
[0072] a gate dielectric layer 5 formed on the surface of the channel 4;
[0073] The back gate 6 is formed on the back side of the underlying silicon 13 .
[0074] Further, the surface modifier is 3-aminopropyltriethoxysilane, of c...
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