Semiconductor package structure and manufacturing method thereof
A technology of packaging structure and manufacturing method, which is applied in the direction of semiconductor/solid-state device manufacturing, semiconductor device, semiconductor/solid-state device components, etc. The effect of electrical circuit distance, reduced spacing, and reduced thickness
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[0046] Figure 1A to Figure 1G It is a schematic cross-sectional view of a manufacturing method of a semiconductor package structure according to an embodiment of the present invention. Please refer to Figure 1A , The manufacturing method of the semiconductor package structure of this embodiment includes the following steps. First, a metal carrier board 110 is provided, and a patterned circuit layer 120 is formed on the metal carrier board 110 . In detail, the patterned circuit layer 120 has an upper surface 122 and a lower surface 124 opposite to each other, wherein the lower surface 124 of the patterned circuit layer 120 faces the metal carrier 110 and is connected to the metal carrier 110 . The patterned circuit layer 120 includes a plurality of circuits 123, and each circuit 123 has a first end 123a and a second end 123b extending from the first end 123a, wherein the second end 123b is away from the first end The direction of the portion 123a extends. In particular, in...
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