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Static random access memory (SRAM) with redundant structure

A technology of static random storage and redundant structure, applied in the field of memory, can solve problems such as unoptimistic working conditions and damage to the self-recovery mechanism of DICE units

Inactive Publication Date: 2013-10-02
TSINGHUA UNIV +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in the read mode, the two pairs of nodes inside the DICE unit will be connected through the read-write tube, which will destroy the self-recovery mechanism of the DICE unit, resulting in a permanent flip of the unit, making the hardened SRAM chip based on the DICE unit work in a heavy ion environment. optimism

Method used

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  • Static random access memory (SRAM) with redundant structure
  • Static random access memory (SRAM) with redundant structure
  • Static random access memory (SRAM) with redundant structure

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Embodiment Construction

[0019] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary and are intended to explain the present invention and should not be construed as limiting the present invention.

[0020] In view of the shortcomings of the existing static random access storage unit mentioned in the above background, the present invention provides a static random access storage unit with redundant structure, which effectively overcomes the problem of low power consumption and high stability while achieving low power consumption and high stability. There may be soft errors in memory cells.

[0021] Compared with the traditional 6T static random access memory unit, the static random access memory unit of the present invention ...

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Abstract

The invention discloses a static random access memory (SRAM) with a redundant structure. The SRAM comprises first to fourth pull-up tubes, first to fourth pull-down tubes, first to fourth load tubes, and first to fourth gate tubes. On the basis of a conventional SRAM structure, the load tubes are added between drains of the pull-down tubes and the pull-up tubes; the threshold value of each load tube changes within a range of -VDDI / 2-0v, so that under the condition of no soft error, the load tubes are in a turn-on state all the time, and memory information is kept; under the condition of existence of soft errors, through the load tubes and a feedback mechanism of the redundant structure, the memory information can be recovered. The SRAM with the redundant structure has the advantages of high soft error resistance, high stability, low power consumption and compatibility with a commercial logic process.

Description

technical field [0001] The invention belongs to the technical field of memory, and in particular relates to a redundant structure static random memory unit. Background technique [0002] SRAM (Static Random Access Memory), that is, static random access memory, as the main member of the semiconductor memory family, SRAM is the most widely used memory in the world. It is an indispensable component in digital processing, information processing, and automatic control equipment . [0003] Under the deep sub-micron process conditions, the internal variability of the chip is increasing, and the power supply voltage VDD is gradually decreasing, which affects the stability of the SRAM memory unit to a certain extent. This series of changes will lead to some unexpected problems, making the reliability of semiconductor memory devices worse. The problem of soft errors (Soft Error) caused by high-energy charged particles incident on the sensitive nodes of SRAM cells is attracting more ...

Claims

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Application Information

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IPC IPC(8): G11C11/413
Inventor 潘立阳刘雪梅伍冬陈虹麦宋平
Owner TSINGHUA UNIV
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