Low drop-out linear voltage stabilizer and regulation circuit thereof

Abstract

The invention discloses a low drop-out linear voltage stabilizer and a regulation circuit thereof. The low drop-out linear voltage stabilizer comprises a first PMOS (P-channel metal oxide semiconductor) transistor, a second PMOS transistor, a third PMOS transistor, a first NMOS (N-channel metal oxide semiconductor) transistor and a first current source, wherein the grid electrode of the first PMOS transistor is connected with the drain electrode of the third PMOS transistor and the drain electrode of the first NMOS transistor; first voltage is input into the source electrode of the first PMOS transistor; the drain electrode is connected with the source electrode of the second PMOS transistor; the drain electrode of the first PMOS transistor is suitable to connect with the output end of the low drop-out linear voltage stabilizer; the grid electrode of the second PMOS transistor is suitable to connect with the output end of an error amplifier or buffer unit of the low drop-out linear voltage stabilizer; the drain electrode of the second PMOS transistor is connected with the source electrode of the first NMOS transistor and the first end of first current source; second voltage is input into the grid electrode of the third PMOS transistor, and the first voltage is input into the source electrode of the third PMOS transistor; the first voltage is input to the grid electrode of the first NMOS transistor; the second voltage is input into the second end of the first current source; and the voltage value of the first voltage is more than the voltage value of the second voltage.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a low-dropout linear voltage regulator and its adjustment circuit. Background technique [0002] Low Dropout Regulator (LDO) is a step-down DC linear regulator. With the development of SOC (System on Chip, System on Chip) technology, it is widely used in computers, communications, instrumentation, and consumer electronics. , camera surveillance and other industry applications are ubiquitous. Although compared with the DC-DC switching voltage converter, the efficiency of the LDO is lower, but it has the advantages of fewer peripheral components, small ripple, low noise, small chip area, and simple circuit structure, so the LDO is used in power management chips. has always held a large proportion. [0003] With the improvement of integration, more and more LDOs are integrated into the SOC chip as a sub-module of the SOC chip to supply power to a key module, and a powe...

AI Technical Summary

Problems solved by technology

The size of the transistor used by the error amplifier OP is relatively large, so it takes a long time for the changed voltage of the LDO output terminal Vout to finally reflect to the gate of the PMOS adjustment transistor MP, resulting in a slow recovery speed of the voltage of the LDO output terminal Vout

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